本研究主要是利用溶液法製備氧化鋅錫薄膜電晶體(Zinc Tin Oxide thin film transistors, ZTO TFT)，薄膜電晶體經過穩定性操作後，再利用掃描電位顯微鏡量測氧化鋅錫表面電位的變化。主動層選用氧化鋅錫的目的是避免添加鎵或銦等貴重金屬，製程所需的價格較便宜且無毒性，薄膜電晶體的電性表現也與添加貴重金屬後所製成的元件相同，對於未來的應用相當有潛力。再者利用旋轉塗佈法/溶液法，可連續鍍製薄膜製程，製作環境不需要使用真空設備，具有簡單、低成本、以及高生產率優勢。
研究的第一部分為針對不同ZTO主動層厚度(分別為4nm、13nm、22nm)的薄膜電晶體於各種操作後的表現與穩定性量測。首先ZTO主動層在厚度只有4nm的條件下，此薄膜電晶體元件擁有高場效載子遷移率8~10cm2/Vs，次臨界斜率表現為~0.5V/decade，電流開關比約108；當ZTO薄膜厚度調整到13nm與20nm時，其場效載子遷移率分別可到18 cm2/Vs和22 cm2/Vs。於此同時，有鑑於薄膜電晶體在實際應用上，元件會受到正負偏壓反覆施加操作，並且受到背光源影響，因此實驗中利用雷射照光(波長為532nm)，亦或搭配施加偏壓(分別施加0或+20或-20伏特)探討電晶體的穩定性，操作包含正閘極偏壓應力、負閘極偏壓應力、正閘極偏壓加照光應力、負閘極偏壓加照光應力與照光應力，並對偏壓或照光移除後元件回復的狀況進行紀錄。
第二部分的研究則是對於不同厚度的薄膜電晶體元件，施加不同條件的偏壓或與照光操作，在回復2000、4000、8000秒時，利用掃描電位顯微鏡量測從源極到主動層與從主動層到汲極的接觸電位差，由接觸電位差可以得到回復時間的表面電位變化(ΔSP)。在此不考慮電極與主動層的接觸電位差差異(ΔCPDAl-ZTO)，只考慮元件在施加不同穩定性操作後主動層的接觸電位差部分，其接觸電位差與起始狀態的接觸電位差差異，也就是主動層的表面電位變化(ΔSPZTO)。如此判斷的原因是來自於掃描電位顯微鏡的試片準備方式，接地的部分只有在主動層，而鋁電極處於浮動(floating)的狀態，在沒有接地的狀況下，元件表面容易累積電荷，影響接觸電位差量測結果。
其中主動層厚度為4nm的薄膜電晶體元件在穩定性測試操作後，ΔSPZTO較其他兩種厚度的薄膜電晶體明顯，而主動層厚度為20nm時，任何穩定性操作後量測掃描電位顯微鏡的ΔSPZTO均小於30mV。原因是當主動層厚度變厚時，元件在穩定性測試操作後臨界電壓值的偏移(ΔVTH)小，同時掃描電位電位顯微鏡的偵測深度有限，造成主動層厚度增加後，元件發生在主動層與介電層的電荷變化無法被儀器偵測到。以主動層厚度在4nm的薄膜電晶體來說，當施加正閘極偏壓、正閘極偏壓照光應力與負閘極偏壓照光應力後，ΔVTH大於7V，同時表面電位的變化是明顯的，與起始狀態的表面電位變化可達30mV以上。因此我們將ΔVTH與表面電位變化(ΔSP)相互對照，用band diagram說明倆著之間的關係，了解其接觸電位差與臨界電壓之間的相關性。

In this study, solution-processed zinc tin oxide thin film transistors (ZTO TFTs) are fabricated to avoid using gallium or indium precious metals. Using solution process, the thin films can be continuously deposited by spin coating in ambience (no vacuum environment is needed), resulting in advantages of low cost and high productivity.
The ZTO TFT with active layer of 4nm, 13nm, and 20nm in thickness without passivation layer are examined by Scanning Electrical Potential Microscopy (SEPM) after different stability operations. Based on the results, the correlation between the variation of contact potential difference (CPD) and transistor threshold voltage shift (ΔVTH) is explored.
In the first part of this study, basic electric performances of 4nm-ZTO TFT, 13nm-ZTO TFT and 20nm-ZTO TFT, and the stability tests including positive bias stress (PBS), negative bias stress (NBS), positive-bias with illumination stress (PBIS), negative-bias with illumination stress (NBIS) and light illumination stress (IS) are presented. In this experiment, the light wavelength is 532nm and the intensity is 5μW/cm2. The 4nm-ZTO TFT has high field-effect carrier mobility of 8~10cm2/Vs, subthreshold swing slope of ~ 0.5V/decade, and the on/off current ratio about 108, while 13nm-ZTO TFT has field-effect carrier mobility of 18cm2/Vs, subthreshold swing slope of ~ 1V/decade and the on/off current ratio of 106, and 20nm-ZTO TFT has field-effect carrier mobility of 22cm2/Vs, subthreshold swing slope of ~ 4V/decade and the on/off current ratio of 104.
In the second part of this study, CPD is measured after stability test, at recovery time of 2000s, 4000s and 8000s, respectively. The CPD is measured along a path from Al source electrode to ZTO active layer, and from ZTO active layer to Al drain electrode. We do not consider the contact potential difference between the Al electrode and the active layer (CPDAl-ZTO) but the surface potential change of the ZTO active layer (ΔSPZTO) at recovery time of 2000s, 4000s and 8000s after stability test. The reason of data judgment based on the setup of SEPM, where the active layer is grounded and the electrode is at floating state. There may be charge accumulation at Al electrode, which will influence CPD measurement.
For TFTs with active layers of different thicknesses, the 4nm-ZTO TFT has more pronounced CPD variation than the 13nm-ZTO TFT and 20nm-ZTO TFT on the ZTO active layer after stability test. This observation suggests that the trap-and- release of electrons at the interface between active layer and dielectric in transistor can be detected by SEPM only for substantially thin active layer. The relationship between change of CPD and the VTH shift of TFTs can be explained by band bending.

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