目前記憶體的工作時脈速度逐漸升高，以DDR400為例，已到達200MHz，所以製作晶圓測試探針卡公司，無不朝著高速高頻的方向去設計，但同時考量能平行測試晶片數目要越多越好的情況，需增加探針卡上的導線數目，使的探針卡操作在高速的時脈速度下，所帶來的訊號干擾更加嚴重。
在本論文中，以500MHz的高速數位訊號為工作頻率，在矽基板上設計傳輸線，在控制訊號干擾的情況下，增加此線路晶片上的導線數目。製作過程先以軟體IE3D決定導線的規格，並模擬導線間的串音(Crosstalk)干擾，接著將結構製作在覆蓋以聚亞醯胺(polyimide)為介電層的矽(SiO2/Si)基板上，而後再將導線製作在聚亞醯胺(polyimide)上或嵌入其內的方式，並探討此設計的可行性。

Presently, the clock rate of memory has gotten higher, for instance, that of DDR400 has reached 200MHz. As a result, all the companies that manufacture probe cards of wafer tests have made efforts to design new products which can be tasted under high speed and high frequency. However, a greater number of chips of parallel tests on the probe card might cause more serious interferences to the signals of traces at the same time.
The thesis proposes the design of traces on silicon substrates, working on the digital signal of 500MHz. Then, in the condition of controlling signal interferences, we try to increase the number of traces in hopes of increasing the number of chips of parallel tests. During the process, firstly, the trace spec. are determined by IE3D. and further the cross talk between transmission lines is simulated. Moreover, the design is demonstrated on the silicon substrates covered with polyimide as dielectric layers, and then traces either processed or embedded the on polyimide. In the end, traces on this previous structure are measured with Time Domain Refectometry. By comparing measure results with simulations, we discuss the feasibility of the design.

[1] 何宗憲，"IC測試製程與設備簡介"，機械工業雜誌，189卷，pp.189-203，1998
[2] Sporck, N ” A new probe card technology using compliant Microsprings”, Test Conference, Proceedings, International, pp. 527-532, 1997
[3] 王怡均譯,”電磁學,” 超級科技圖書，pp. 389-431，五版，1980
[4] Stephen H. Hall, Garrett W. Hall, and James A. Mccall, “High-Speed Digital System Design-A Handbook of Interconnect Theory and Design Practices”, John Wiley & Sons, 2000.
[5] Howord W. Johnson, “ High-Speed Design-A Handbook of Black Magic,” New Jersey, Prential-Hall, 1993.
[6] 柯志祥“TSOP-54L電子構裝電氣特性之電磁模擬與量測, ” 國立成功大學電機工程研究所碩士論文,民國88年6月。
[7] 張盛富，戴明鳳著，”無線通信之射頻被動電路設計” , 全華科技圖書，初版一刷，民國86年4月。
[8] Mehran, Reza, “Computer-aided design of microstrip filters considering dispersion, loss and discontinuity effects,” IEEE Trans., MTT-27, pp. 239-245 , Mar. 1979.
[9]Sussman and Hantgan, “Spice implementation of lossy transmission line and Schottky Diode Models”, IEEE Trans. MTT, 36-1, pp. 153-155, Jan. 1988.
[10] R. A. Pucel, D. J. Masse, and C. P. Hartwing, “ Losses in Microstrip,” IEEE Trans. On Microwave Theory and Techniques, Vol. MTT-16, pp. 342-350, Jun. 1968.
[11] John F. Whitaker, Theodore B. Norris, G. Mourou, and Thomas Y. Hsiang, “Pulse Dispersion and Shaping Microstrip Lines,” IEEE Trans. On Microwave Theory and Techniques, Vol. MTT-35, pp. 41-47, Jan. 1987.
[12] H. A. Wheeler, “ Transmission-line properties of parallel strips separated by a dielectric sheet,” IEEE Trans. On Microwave Theory and Techniques, Vol. MTT-13, pp. 172-185, Mar. 1965.
[13] Howard W. Johnson, Martin Graham. ”High-speed digital design”， Englewood Cliffs, N.J. :/Prentice Hall,/c1993.
[14]陳明坤“高速負載版電磁干擾分析與故障模型建立之研究”,私立義守大學電子工程研究所碩士論文,民國91年6月。