近年來氧化物半導體的薄膜電晶體的大幅進展提供了取代以矽通道的薄膜電晶體的選擇。然而為了降低操作電壓與得到較大的驅動電流，有必要應用高介電係數的閘極介電層以增加閘極金屬電極與通道之間的耦合電容。在本篇論文中，我們先用高介電係數閘極介電層提升濺鍍法製作的「氧化鋅」與「氧化銦鎵鋅」薄膜電晶體的特性。接著，在薄膜電晶體良好的電性基礎之下，我們發展出一種應用氮化物捕陷層的非揮發性記憶體，此結果有機會取代傳統多晶矽通道的浮動閘極非揮發性記憶體。
在製作「氧化鋅」薄膜電晶體的方面，我們利用高介電係數閘極介電層「氧化鑭鉿」與「超薄氧化鋅」通道來改善氧化鋅薄膜電晶體的整體特性。因為氧化鋅具有在室溫下沈積結晶的特性，而此種隨機無秩序的結晶使得通道介面態位增加，會造成薄膜電晶體閘極漏電，而損害薄膜電晶體的整體特性。為了降低漏電，我們採取減小氧化鋅薄膜主動層的厚度的方法來改善，實驗結果顯示在厚度為6奈米的情況之下，氧化鋅呈現非晶相。如此一來，利用高介電係數閘極介電層氧化鑭鉿的氧化鋅氧化薄膜電晶體之電特性也隨之改善。改善後的氧化鑭鉿/氧化鋅薄膜電晶體具有臨限電壓0.28 V、次臨界擺幅0.26 V/dec、載子移動率3.5 cm2/V-s以及電流開關比1×106的特性。此外，我們亦應用另一高介電係數閘極介電層「氧化鈦鉿」製作氧化鋅薄膜電晶體，我們探討了這種高介電係數材料分別經過300-600oC的熱處理之後對元件特性的影響。由實驗結果顯示，高介電係數閘極介電層接受500oC之熱退火的薄膜電晶體，其特性最佳。
其次，在製作「氧化鎵銦鋅」薄膜電晶體的方面，我們製作出的氧化鑭鉿/氧化鎵銦鋅薄膜電晶體具有低臨限電壓0.22 V、高電流開關比5×107、優良移動率25 cm2/V-s、非常低的次臨界擺幅0.076 V/dec，並且能夠允許元件在2 V的電壓之下操作。此外，我們亦成功將氧化鑭鉿/氧化鎵銦鋅薄膜電晶體製作在聚亞醯胺基板上，此項成果展現出利用此種材料與結構實現軟性電子的可能性。
最後，在非揮發態記憶體方面，藉由雙穿遂層-雙阻障層-雙補陷層的「閘極電荷捕陷工程快閃記憶體」(CTEF)，特性優於傳統的「金屬-氧化物-氮化物-氧化物-半導體」(MONOS)的元件，其展現出分別為10 V與-12 V的程式化與抹除電壓，分別為1 ms與100 us的快速的反應時間，並且在初始在記憶窗為1.6 V之下，經過104秒之後僅微幅減小到1.4 V，當外插時間延伸到十年後僅減小到1.2 V，這是目前文獻上的最佳結果。
綜合以上的結果，結合高介電係數與氧化物半導體的元件將有將有機會被利用在系統面板上。

Oxide-semiconductor-based thin-film transistors have advanced remarkably in recent years, providing an attractive alternative to silicon-based thin film transistors (TFTs). However, in order to operate these oxide TFTs at low bias voltage and high driving current, high-k gate dielectrics are needed to increase the capacitive coupling between the gate electrode and the channel active layer. In this thesis, firstly of all, we applied novel ternary high-k gate dielectric materials to enhance the performance of sputtered ZnO and InGaZnO thin-film transistors. In addition, based on the good TFT characteristics, we also made nitride-trapping nonvolatile memories (NVMs) that showed great prospect in replacement of the conventional poly-Si floating gate device.
In the aspect of ZnO TFTs, hafnium-lanthanum-oxide (HfLaO) and ultrathin ZnO were used to improve the overall electrical characteristics of ZnO TFTs. Because the property of ZnO inclined to form random polycrystalline phases, which results in high gate leakage even fabricated at room temperature, the amorphous ZnO is highly preferred in TFTs. We improved the electrical characteristics of HfLaO/ZnO TFTs by reducing the thickness of ZnO, which formed amorphous phase in 6-nm thickness in this experiment. The resulting HfLaO/ZnO TFTs displayed a threshold voltage (VT) of 0.28 V, a subthreshold swing (SS) of 0.26 V/dec, a mobility (uFE) of 3.5 cm2/V-s and a On/Off current ratio of 1×106. In addition, we also demonstrated the feasibility of producing a ZnO thin-film transistor using another high-k material titanium hafnium oxide (TiHfO) as the gate dielectric. The prepared samples were subjected to post-deposition annealing (PDA) in oxygen ambient at 300-600oC to evaluate the effect of temperature on the device characteristics, in which we acquired the best electrical characteristics after 500oC PDA.
Next, in the aspect of InGaZnO TFTs, the present HfLaO/InGaZnO have displayed remarkable characteristics, showing a low VT of only 0.22 V, a high IOn/IOff of 5×107, a good FE of 25 cm2/V-s, and an excellent SS of 76 mV/dec, permitting low power operation at 2 V. In addition, the HfLaO/InGaZnO transistor was also fabricated on the polyimide (PI) substrate to realize the future possibility in the application of flexible electronics.
Finally, in the aspect of nonvolatile memories, by using the double-tunneling, double-blocking and double-trapping layers, the charge-trapping-engineered flash (CTEF) instead of the conventional metal-oxide-nitride-oxide-semiconductor (MONOS) device showed a low program/erase (P/E) voltage of 10 V/-12 V and a fast 1 ms/100 us speed. The initial memory window was 1.6 V, decreasing only slightly to 1.4 V at 104 sec. The 1.2 V extrapolated 10-year window is among the best reported for an IGZO NVMs.
From the promising results mentioned above, the integration of the high-k gate dielectric with the oxide semiconductor active layers can reach the goal of system-on-panel (SoP) in the future.

Chapter 1
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Chapter 2
[2.1] E. Fortunato, A. Goncalves, A. Pimentel, P. Barquinha, G. Goncalves, L. Pereira, I. Ferreira, R. Martins, “Zinc oxide, a multifunctional material: from material to device applications,” Appl. Phys. A, no. 96, pp. 197–205, Jan. 2009.
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[2.4] E. M. C. Fortunato, P. M. C. Barquinha, A. C. M. B. G. Pimentel, A. M. F. Goncalves, A. J. S. Marques, L. M. N. Pereira, and R. F. P. Martins, “Fully transparent ZnO thin-film transistor produced at room temperature,” Adv. Mater., vol. 17, no. 5, pp. 590–594, Mar. 2005.
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Chapter 3
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Chapter 4
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Chapter 5
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Chapter 6
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