電阻式記憶體 (ReRAM) 因其結構簡單 (採用MIM架構)、低功耗、高整合度，以及與傳統CMOS製程的高度相容性，被視為最具潛力的次世代非揮發性記憶體技術之一。不同於傳統以離散狀態儲存資料的記憶體，ReRAM透過電壓誘導的電阻切換機制，可實現電阻值的連續調變，展現類比特性。這使其能夠模擬生物突觸中關鍵的「突觸可塑性」，因此被廣泛認為是神經型態運算與神經網路硬體加速器中理想的突觸元件候選技術。此外，因應當前Von Neuman架構在資料搬移上的瓶頸，ReRAM的In-Memory Computing架構可實現權重儲存與矩陣乘法的同步運算，有效減少資料搬運，提升神經網路運算效率。
過往相關研究多半使用模擬的脈衝控制電阻資料或電路模型來執行ReRAM權重對應實驗，儘管具備概念驗證意義，卻受限於難以取得實際元件數據，並需仰賴複雜的實驗設備與脈衝控制系統。為了解決此問題，本研究提出一種以DC掃描量測資料為基礎的替代方法，藉此模擬ReRAM元件於神經網路訓練過程中的權重映射表現。該方法無須額外脈衝控制電路，即可利用大量實測資料，建立可擴展且更貼近實務的模擬訓練流程。
本研究採用六種 ReRAM元件之量測資料，分別為使用BFO與 BTO為切換層材料之單層結構，以及兩種材料交錯堆疊所形成之三層結構元件。實驗中透過Agilent B1500A量測各元件在不同循環下的I–V特性，並計算在指定讀取電壓下的電阻值。這些電阻值再被映射至使用MNIST資料集訓練之全連接神經網路模型中的權重值。訓練過程中，模型每個Epoch皆隨機選取某元件循環，並以該循環中取得的電阻資料動態替換模型隱藏層與輸出層間的權重，藉以模擬實際元件導入模型所產生的影響。最後記錄每個元件對應模型的準確率與收斂速度，作為比較依據。實驗結果顯示，元件物特性與神經網路訓練表現間存在明顯關聯性。三層結構元件在Set電壓變異性較小、電阻切換行為更穩定的情況下，普遍能提供更高的準確率與更快的收斂速度。特別是展現漸進式切換行為的元件，其循環間切換一致性較佳，有助於提高權重對應的穩定性與可靠性。其中一款使用FTO為基板之三層元件在各項評估指標中表現最佳，驗證了穩定且連續可調的切換行為有助於類突觸應用中權重的高精度調變。
綜合來說，本研究建立一套可整合直流量測資料至神經網路訓練流程的實驗方法，提供從元件物理行為到演算法層級的整合分析視角。不同於假設元件特性理想化的模擬研究，本方法能反映真實元件的非理想性，並提供大量資料下的統計分析結果。此流程亦可作為未來 ReRAM 類神經網路硬體整合開發之參考依據。研究結果顯示，ReRAM 元件之開關類型 (Abrupt/Gradual) 耐久度、Set 電壓變異性與開關比等物理參數，皆會影響模型學習效率與準確率。藉由本方法，可進一步探索元件層級特性如何影響類神經系統效能，有助於推進ReRAM於AI晶片系統中的實際應用。

Resistive Random Access Memory (ReRAM) has emerged as one of the most promising candidates among next-generation memory technologies due to its non-volatility, simple metal-insulator-metal (MIM) structure, low operating voltage, and high compatibility with CMOS processes. Unlike traditional memory, ReRAM can achieve continuously tunable resistance states via voltage modulation, making it suitable for emulating synaptic plasticity in biological neural systems. As a result, ReRAM is considered an ideal synaptic device in neuromorphic computing and artificial neural network (ANN) accelerators. In particular, under the in-memory computing (IMC) architecture, ReRAM offers the potential to alleviate the data transfer bottleneck and energy consumption issues inherent to the von Neumann architecture.
In this work, we propose a simulation framework based on experimentally measured direct current (DC) sweep data instead of using simulated pulse-based data typically reported in literature, to investigate the integration of ReRAM with neural network models. Six ReRAM devices with different switching layer structures were fabricated and characterized. We then mapped the measured resistance values from the DC sweep data to the weights between the hidden and output layers of a neural network model, which was trained on the MNIST dataset to evaluate classification accuracy and convergence behavior.
Experimental results demonstrate that the electrical properties of different ReRAM structures significantly impact the training performance of the neural network. ReRAM devices with tri-layer switching structures exhibited better average accuracy and faster convergence than single-layer designs. In particular, devices with more gradual resistance switching behavior and a lower coefficient of variation (CV) in switching voltage showed better cycle-to-cycle switching uniformity, leading to more stable and precise weight mapping during training.
In conclusion, this study establishes a practical framework for simulating neural networks used for deep learning based on real-world ReRAM measurement data. It highlights the influence of device-level characteristics on learning outcomes and suggests that distinct ReRAM switching behaviors—in particular, the gradual and consistent switching—are more favorable for analog synaptic implementations. This approach provides valuable insights for evaluating and integrating ReRAM into AI hardware systems and IMC-based neuromorphic architectures.

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