近年來由於無線網路感測器或穿戴式裝置的發展日益增加，本研究設計一款能源採集器為其提供能源供應。熱電能源採集器能夠利用賽貝克效應(Seebeck effect)將環境中熱能轉換成電能。為了提升熱電能源採集器的功率輸出，本論文利用單層多晶矽CMOS製程結合雙空腔結構設計，提升熱電能源採集器的性能，同時減少製程的步驟。本研究5 mm × 5 mm晶片採用TSMC 0.18 μm 1P6M CMOS 製程，由於其多晶矽的Seebeck係數較前人所使用的製程高，其輸出電壓較高。此外，由於此製程只需單層多晶矽，透過不同的摻雜，即可得到不同的材料特性，因此製程步驟較前人的製程簡單。本研究也修改了前人的雙空腔結構設計，使熱電能源採集器用有更好的結構穩定、絕緣性、以及更好的熱傳導。實驗結果顯示，一個1.5 mm × 1.5 mm的發電單元之輸出可以達到0.105 μW/cm2K2的功率係數，以及15.60 V/cm2K的電壓係數。除此之外，本研究提出了一個改良的晶圓級封裝方式，透過封裝增加熱電能源採集器的熱電偶數，改善封裝後的熱分佈問題。

Energy harvesting is a major challenge in developing wireless sensor network (WSN) applications. A thermoelectric generator (TEG) can generate electric energy by the temperature difference between a hot and cold junction through the Seebeck effect. This thesis proposes a TEG chip with double cavity design by TSMC 0.18 μm 1P6M CMOS process. This design has better Seebeck coefficient from the polysilicon layer and better structure design to obtain higher performance. Measurement result shows that the TEG chip has voltage factor 15.60 V/cm2K and power factor 0.105 μW/cm2K2 in a 1.5 mm × 1.5 mm unit cell, about 5.4 times and 2.34 times of the previous work by using TSMC 0.35 μm 2P4M CMOS process, respectively. In addition, an improved wafer level packaging is proposed for TEG chip for better thermal distribution.

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