| 研究生: |
莊雅筑 Zhuang, Ya-Zhu |
|---|---|
| 論文名稱: |
影像除霧電路之設計與實現 VLSI Implementation of an Image Defogging Method |
| 指導教授: |
陳培殷
Chen, Pei-Yin |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 資訊工程學系 Department of Computer Science and Information Engineering |
| 論文出版年: | 2011 |
| 畢業學年度: | 99 |
| 語文別: | 中文 |
| 論文頁數: | 52 |
| 中文關鍵詞: | 單張影像除霧 、邊緣偵測 、VLSI硬體實現 |
| 外文關鍵詞: | defogging technique, edge-preserving, VLSI |
| 相關次數: | 點閱:127 下載:3 |
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在監視系統或行車紀錄器等數位影像應用當中,當天氣有霧的情況下,會造成擷取到的影像模糊不清,無法得到完整且清晰的影像資訊。因此如何有效地排除霧氣對影像造成的影響,是數位影像處理中一個非常重要的議題。此外,除霧的技術可能實作在需要即時運算的電子產品當中,所以一個效果良好、低複雜度且適合以VLSI硬體電路實作的影像除霧技術是不可或缺的。
在本論文中,我們提出一個低複雜度的即時除霧演算法。此方法主要分為兩大步驟:1)利用暗原色先驗統計(dark channel prior)技術來估計大氣光(atmospheric light)強度,2)使用邊緣偵測技術來判斷邊緣存在與否,並根據邊緣偵測結果選擇適當的低通濾波器(lowpass filter)或是均值濾波器(mean filter)來得出穿透霧氣的透射強度值。實驗結果證明,我們所提出的方法能有效地增強影像的能見度。
針對所提出的演算法,我們也設計了一個高效能的八級管線化VLSI硬體架構,並用Verilog硬體描述語言來實現。根據SYNOPSYS的Design Compiler與TSMC 0.13μm標準元件庫的合成結果,此電路需要的邏輯閘數目為12.8K,工作時脈可以達到200MHz,其處理速度滿足Full HD(1920×1080)每秒30張影像的格式需求。
In many applications, such as environment monitors and vehicle surveillance recorder, images might be corrupted due to the bad weather effects such as fog or dense haze. Thus, we need a defogging technique for image reconstruction. In some practical real-time applications, the defogging process is included in end-user equipment, so a good lower-complexity defogging technique, which is simple and suitable for low-cost VLSI implementation, is necessary.
In this thesis, we proposed an efficient defogging method. A simple procedure for atmospheric light estimation is presented to reduce the computing complexity of sorting operation. Besides, the edge features of transmission map is efficiently preserved by using the lowpass filter and mean filter according to the detection results. The experiment results demonstrate that our method can increase the visibility of image.
The VLSI architecture for the proposed designs is implemented and synthesized by using Verilog HDL and SYNOPSYS Design Compiler with TSMC 0.13μm cell library. Synthesis results show that the circuit can achieve a processing rate of 200 MHz and contain 12.8K gate counts. It is quick enough to process a Full HD video (1920×1080) at 30 fps in real time.
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[13]影像來源http://www.cs.huji.ac.il/~raananf/projects/defog/index.html
[14]影像來源http://people.cs.uu.nl/robby/fog/index.html
[15]影像來源http://personal.ie.cuhk.edu.hk/~hkm007/cvpr09/
校內:2021-12-31公開