本研究採用化學氣相傳導法（Chemical Vapor Transport, CVT）合成之高品質二維過渡金屬硫屬化物（2D TMDCs）2H-MoTe2 塊狀晶體，並利用聚二甲基矽氧烷（PDMS）彈性體薄膜進行微機械剝離（Mechanical Exfoliation），精準構築出厚度介於 5至 10 nm（約對應 7 至 14層）之少層通道主動層，隨後將其精準轉移至具有 90( nm) 熱氧化二氧化矽（SiO2）介電層的高摻雜矽基板上，以構築背閘極場效電晶體（Back-Gate FET）架構，藉此深入探討其本質材料物理特性與異質接面之電荷傳輸機制。然而，由於 2H-MoTe2材料本身具備較高的表面活性，極易在製程環境中形成碲空缺（Tellurium Vacancies, Te）等點缺陷，且極易引發環境中水氣與氧氣分子的物理或化學吸附，導致未經鈍化處理的元件在空氣環境下其電學特性會呈現顯著且快速的隨時間退化（Time-dependent Degradation）現象。
為此，本論文導入快速熱退火（Rapid Thermal Annealing, RTA）與二氯甲烷（Dichloromethane, DCM）浸泡等優化製程，全方位改善轉移後二維材料與介電層之接面形貌（Interface Morphology）並抑制金半接面之劣化行為。本研究確保大部分製程均在水氧濃度極低（H2O、O2 < 0.5ppm）的高純度氮氣手套箱內完成，且特別在執行黃光微影製程前，先一步實施快速熱退火（於H2/N2 = 5%/95%） 的還原性混氣環境中，在 400°C下高溫退火3min，此製程不僅利用熱驅動效應有效驅離微機械剝離與轉移製程中殘留於材料表面的物理吸附水氧及有機殘留物，更有助於釋放薄片內部的幾何應力，使其更為平貼於 SiO2 介電層表面以大幅優化界面接觸。
元件於完成金屬電極蒸鍍後，隨即以最快速度移轉並抽入高真空低溫量測座中，從物理本質上切斷與外界環境的接觸，以確保所測得之元件電性皆能真實反映材料的初始品質。電學測試結果顯示，由 CVT 法所成長之本質 2H- MoTe2剝離薄片在初始狀態下呈現偏向 n 型（n-type）的電荷傳輸特徵，然而在長時間的環境追蹤量測中，可以觀察到其轉移曲線（Id-Vg）會逐漸向 p 型（p-type）特徵發生漂移；此一電性演變之微觀機制，主要源於不同樣品間晶體缺陷（如碲空缺）密度的統計性差異，進而引發相異的氧氣分子吸附速率，由於吸附的氧分子作為受體態（Acceptor-like States）會捕獲通道內的電子，使得二維材料的費米能階（Fermi Level）位置隨時間發生動態位移。基於此一界面物理行為，本論文聚焦於探討不同接觸金屬（Ti、Cr、Au、In、Bi、Sb）與 2H-MoTe2接面之平帶蕭特基能障高度（Flat-band Schottky Barrier Height），並深入定量評估新型半金屬接觸解除費米能階釘扎（Fermi Level Pinning, FLP）之微觀效果，以此作為解析、調控並優化二維半導體2H-MoTe2電子元件元件特性之核心物理論述。

This thesis systematically investigates the material properties, interfacial engineering, and heterojunction charge transport characteristics of back-gate field-effect transistors (BG-FETs) fabricated with high-quality 2H-MoTe2 channel layers. The active layers, with thicknesses precisely controlled between 5 and 10 nm (corresponding to 7 to 14 layers), were prepared by mechanical exfoliation using polydimethylsiloxane (PDMS) stamps from bulk single crystals synthesized via chemical vapor transport (CVT). These flakes were transferred onto highly doped silicon substrates featuring a 90-nm-thick thermally grown silicon dioxide (SiO2) dielectric layer. To overcome the prominent degradation of unpassivated devices caused by tellurium (Te) vacancies and atmospheric adsorption of oxygen and moisture, rapid thermal annealing (RTA) in a reducing H2/N2 environment (400°C for 1 to 3 minutes) and dichloromethane (DCM) soaking were implemented as interfacial optimization treatments.
A comparative contact engineering study was conducted using six distinct contact metals: traditional three-dimensional transition metals (Ti, Cr, Au) and semimetals or low-deposition-temperature metals (In, Bi, Sb). While traditional metal contacts suffer from severe Fermi level pinning (FLP) with a pinning factor (S) near zero (-0.02662), the introduction of low-deposition-temperature semimetals/metals successfully alleviated the pinning effect, raising the pinning factor to 0.35635. In particular, indium (In), bismuth (Bi), and antimony (Sb) contacts demonstrated superior interface control and electrical properties. The In-contact device achieved an ultra-low flat-band Schottky barrier height (FBSBH) of 3.961 meV, a remarkable field-effect mobility of 71.14 cm²/V·s, and an outstanding on/off ratio exceeding 10⁷. The Bi-contact device also exhibited an exceptionally low FBSBH of 52.62 meV and a mobility of 23.66 cm²/V·s. Meanwhile, the Sb-contact device exhibited a highly symmetric, ambipolar carrier transport profile due to the alignment of its work function (~4.5 eV) with the 2H-MoTe2 Fermi level (~4.7 eV), achieving an FBSBH of 147 meV and a mobility of 2.86 cm²/V·s. These results provide a robust pathway for realizing low-barrier, high-performance n-channel and ambipolar 2H-MoTe2 field-effect transistors.

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