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研究生： 蔡秉軒
Tsai, Ping-Hsuan
論文名稱： 以FPGA實現一基於膚色的即時人臉偵測系統
The FPGA Implementation of a Face Detection System Based on Skin Color
指導教授： 陳進興
Chen, Chin-Hsing
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電腦與通信工程研究所
Institute of Computer & Communication Engineering
論文出版年： 2023
畢業學年度： 111
語文別： 英文
論文頁數： 51
中文關鍵詞： 現場可程式化邏輯閘陣列 、膚色偵測 、影像處理 、框選處理 、膨脹與侵蝕 、即時
外文關鍵詞： Field-Programmable Gate Array (FPGA), real-time, image processing, skin color detection, dilation and erosion, bounding box processing
相關次數： 點閱：133  下載：8 
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    • 此篇論文提出了一個基於膚色的實時人臉偵測系統，並在FPGA上進行了硬體實現。該硬體實現包括二值化模塊、侵蝕與膨脹模塊、累積與閾值模塊、隨機存取記憶體（RAM）模塊、VGA控制模塊和確定框模塊。本系統將攝影機捕捉到的Raw Data，轉成RGB Data，將資料中膚色的部分標示出來轉二值化、然後經過膨脹與侵蝕的處理後，再將影像切分成許多個64×64的方塊，計算每個方塊中經過膨脹與侵蝕的膚色pixel數量以及黑色pixel的數量，並隨時寫進RAM，若大於設定的臨界值，就進行框選，最後以VGA的形式輸出到顯示器上。整體影像處理以 640×480 的解析度輸出，並達到即時的要求，也就是每秒60幀的影格率。

    This thesis proposes a real-time face detection system based on skin color implemented on FPGA. The hardware implementation consists of the Binarization Module, Erosion and Dilation Module, Accumulation and Threshold Module, random access memory (RAM) Module, VGA Controller Module and Determine Box Module. The system converts the raw data captured by the camera into RGB data. It identifies the skin color portion in the data and performs binarization. Then, the image undergoes dilation and erosion processes. It further divides the image into multiple 64 x 64 blocks and calculates the number of dilated and eroded skin color pixels as well as black pixels in each block. These values are continuously written into the RAM. If the calculated values exceed the predefined threshold, the corresponding block is selected. Finally, the processed image is outputted to a display monitor in VGA format. The overall image processing operates at a resolution of 640 x 480 pixels and achieves real-time performance with a frame rate of 60 frames per second.

    摘 要 I Abstract II 誌　謝 III Acknowledgment IV Contents V List of Tables VII List of Figures VII Chapter 1 Introduction 1 1.1 Face Detection 1 1.2 FPGA Based Face Detection 3 1.3 Contributions 4 1.4 Thesis Outline 5 Chapter 2 The Working Principles of Face Detection and Implementation Platform 6 2.1 Overview 6 2.2 Color Detection 7 2.2.1 Skin Color Detection 7 2.2.2 Black Color Detection 9 2.3 Morphology 10 2.3.1 Erosion 10 2.3.2 Dilation 11 2.4 DE2-115 13 2.5 TRDB-D5M Camera 14 2.5.1 CMOS & CCD 15 2.5.2 Working Principle 17 Chapter 3 Hardware Architecture Design of the Proposed System 19 3.1 Devices and Environments 19 3.1.1 Video Decoding Chip 20 3.1.2 Programming Interface 20 3.1.3 The Cyclone IV E FPGA 20 3.1.4 SDRAM 21 3.2 The Top-Level Module 22 3.3 Binarization Module 24 3.4 Morphology Module 25 3.5 Accumulation and Threshold Module 29 3.6 Store Accumulated Value Module 31 3.7 RAM of RGB Pixels Module 32 3.8 VGA Controller Module 33 3.9 Determine Box Module 35 Chapter 4 Experiment Results 37 4.1 Image Processing and Experimental Results 37 4.2 Usage of FPGA Hardware Resources 45 4.3 Analysis of Advantages and Disadvantages 46 Chapter 5 Conclusion and Future Work 47 5.1 Conclusion 47 5.2 Future Work 47 5.2.1 SDRAM Controller 48 5.2.2 Moving Object Detection 48 5.2.3 8-Adjacency 48 5.2.4 Sobel Operator 49 5.2.5 Facial Features 49 References 50

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