| 研究生: |
黃東鴻 Wang, Tong-Hong |
|---|---|
| 論文名稱: |
晶片尺寸封裝銲接至測試板在功率與溫度耦合循環下之暫態熱傳分析和可靠度評估 Transient Thermal Analysis and Reliability Evaluation for Board-Level Chip-Scale Packages Subjected to Coupled Power and Thermal Cycling Test Conditions |
| 指導教授: |
林裕城
Lin, Yu-Cheng |
| 學位類別: |
博士 Doctor |
| 系所名稱: |
工學院 - 工程科學系 Department of Engineering Science |
| 論文出版年: | 2009 |
| 畢業學年度: | 97 |
| 語文別: | 英文 |
| 論文頁數: | 88 |
| 中文關鍵詞: | 堆疊晶片 、薄型細間距球柵陣列晶片尺寸封裝(TFBGA) 、溫度循環測試 、功率循環測試 、功率與溫度耦合循環測試 、電子工程設計發展聯合協會 、熱傳特性 、錫球接點 、熱傳-應力循序耦合分析 、可靠度 |
| 外文關鍵詞: | thermal cycling test, coupled power and thermal cycling test, Thin-profile fine-pitch ball grid array (TFBGA), Stacked-dies, Power cycling test, solder joint, JEDEC, thermal-mechanical coupling analysis, reliability, thermal characteristics |
| 相關次數: | 點閱:167 下載:4 |
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為同時評估環境溫度變化及晶片實際運作的熱效應對封裝體可靠度的影響,電子工程設計發展聯合協會於近期發表了功率與溫度耦合循環測試規範。本文首先以暫態熱傳分析探討上板薄型細間距球柵陣列晶片尺寸封裝(TFBGA)在功率與溫度耦合循環測試,提出表格式(tabular)邊界條件來解決溫度循環測試產生隨時間變化的環境溫度。熱傳分析參數亦經穩態熱傳與暫態功率循環實驗驗證。
本研究以熱傳-應力循序耦合分析探討上板薄型細間距球柵陣列單一晶片和雙層堆疊晶片尺寸封裝在功率與溫度耦合循環測試下,晶片功率開啟方式與順序對錫球接點可靠度的影響,並與純粹功率循環和純粹溫度循環引致之可靠度相比較。
由數值分析可知當晶片功率開時,晶片結點溫度與溫度循環曲線即產生差異;而當晶片功率關閉時,其溫度即回歸溫度循環的溫度曲線。遠離晶片端的元件溫度相對較低,但其歷時曲線仍然維持相似形狀。此外,晶片功率開啟或關閉的先後順序搭配溫度循環曲線對元件溫度具有加成或折減的效果。另外,對低功率的應用,功率和溫度耦合循環測試之溫度歷時可經由純粹功率循環之溫度歷時和純粹溫度循環之溫度歷時線性相加取得。
錫球接點可靠度的預測得知,單一晶片TFBGA的晶片功率開啟或關閉的先後順序搭配溫度循環曲線對元件溫度具有加成或折減的效果。大致上功率循環延時愈短,其引致的疲勞壽命亦愈短。然而某些特定的功率循環延時與溫度循環曲線搭配後,因溫度補償效應反而增長了疲勞壽命。對雙層堆疊晶片TFBGA而言,任一晶片運作或兩晶片同步提供對半功率所對應的疲勞壽命大致相同。
To evaluate conjointly the effects of ambient temperature fluctuation and operation bias on the reliability of board-level electronic packages, a coupled power and thermal cycling test has been proposed by JEDEC. In this study, thermal characteristics of a board-level chip-scale package subjected to coupled power and thermal cycling test conditions are first investigated through the transient thermal analysis. Tabular boundary conditions are utilized to deal with time-varying thermal boundary conditions brought by thermal cycling. The numerical model was successfully calibrated using steady-state and power cycling experiments.
The sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, is performed to investigate thermal characteristics along with fatigue reliability of board-level single-die and stacked-dies thin-profile fine-pitch ball grid array (TFBGA) chip-scale packages under coupled power and thermal cycling test conditions. Effects of different power cycling durations and sequences are studied. A pure power cycling and a pure thermal cycling condition are also examined and compared.
For the thermal characteristics, it is obvious form the analysis that the presence of power cycling leads to a significant deviation of the junction temperature from the thermal cycling profile. However, for components away from the die, though the patterns of temperature histories are similar, the temperature excursions are less significant. Moreover, for low-power applications, temperature histories from coupled power and thermal cycling are approximately linear combinations of temperature histories from pure power cycling and the ones from pure thermal cycling.
Thermomechanical reliability prediction indicate that, for the coupled power and thermal cycling test on board-level single-die TFBGA’s, a shorter power cycling duration in general leads to a shorter fatigue life. However, the temperature compensation effect elongates the fatigue life under certain power cycling durations. For the board-level stacked-dies TFBGA’s, reliability performances of a board-level stacked-die package should be similar as long as the total power dissipation prescribed to the package is identical, regardless of how the power distributes among separate dies.
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