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研究生: 林彥暉
Lin, Yen-Hui
論文名稱: 磁控共濺鍍二氧化矽-氧化鋅奈米複合物儲存層之氧化鋅薄膜快閃記憶體研究
The Study of Nonvolatile Zinc-Oxide Thin-Film Transistor Flash Memory with Magnetron Co-Sputtering SiO2-ZnO Nanocomposites Storage Layer
指導教授: 賴韋志
Lai, Wei-Chih
學位類別: 碩士
Master
系所名稱: 理學院 - 光電科學與工程學系
Department of Photonics
論文出版年: 2016
畢業學年度: 104
語文別: 中文
論文頁數: 55
中文關鍵詞: 氧化鋅薄膜電晶體非揮發式記憶體快閃記憶體
外文關鍵詞: Zinc oxide, Thin-film transistor, Nonvolatile memory, Flash memory
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  • 本篇文主要探討非揮發氧化鋅快閃記憶體。快閃記憶體主要分為兩類,一類為在氧化層內部塞入浮閘的元件;另外一類為在氧化層與主動層的介面之間缺陷讓電荷被缺陷抓住的元件。藉由電荷的束縛多寡會改變電晶體的臨界電壓。有別以往,我們挑選氧化鋅作為電晶體的主動層好處是可以在腔體內部一次成長完畢結構簡單、大面積製造、花費低廉,而且氧化鋅場效電晶體的輸出曲線擁有難飽和的特性高 DC 輸出阻抗可應用在高功率元件上。
    本實驗分為兩個部分,第一部分為用不同的退火溫度改善底部閘極氧化鋅薄膜電晶體的負電阻的現象;第二部分為在氧化鋅薄膜電晶體的氧化層內部塞入一層共濺鍍的二氧化矽/氧化鋅的奈米點作為氧化鋅快閃記憶體的浮閘並觀察量子點電荷儲存效應。實驗結果顯示再濺鍍完主動層與氧化層後透過熱退火處理可以降低氧化層與主動層內部的缺陷、氧化鋅薄膜晶向強化間接增加電子遷移率改善輸出曲線的負電阻現象。
    最後實驗在氧化鋅電晶體氧化層內部塞入一層共濺鍍二氧化矽與氧化鋅當作電荷儲存層作為氧化鋅快閃記憶體。關鍵在於共濺鍍二氧化矽與氧化鋅時,氧化鋅的功率不可過高遲滯窗口將會拉大,我認為這是嵌入在二氧化矽內部的氧化鋅趨近於點狀相較於氧化鋅薄膜較容易儲存抓取電子不易側向傳輸、反覆操作由穿隧層漏電逃走,最後在記憶體持續時間的量測一萬秒過後,內嵌入共濺鍍層的電流開關比明顯較沒加入儲存層的薄膜電晶體來的大。

    The purpose of this study is to investigate the nonvolatile Zinc-Oxide (ZnO) thin-film transistor (TFT) flash memory. The flash memory is divided into two categories, one is a device which embedded floating gate in the oxidation; the other is a charge-trapping device using a defect layer to catch charge. With amount of the trapping charge will alter the threshold voltage. The active layer of ZnO as the benefits of our selection is a growth once in internal cavity; simple process, large area manufacturing, low cost, and transistors have high output impedance applying to high power element / device. The experiment is divided into two part, the first part is using annealing treatment to solve output decay characteristic of ZnO thin-film transistors (ZnO-TFTs); the second part in the ZnO-TFTs oxidation layer stuffed inside layer co-sputtered silicon dioxide (SiO2) / Zinc oxide (ZnO) as a floating gate flash memory and observation point charge storage effect with quantum-dot zinc oxide.

    摘要 .................. I 致謝 ................. XI 目錄 .................. XII 表目錄 ................ XIV 圖目錄 ................. XV 第一章序論 ................. 1 1.1 前言 ................ 1 1.2 研究動機與目的 ............. 3 第二章理論基礎 ............... 5 2.1 氧化鋅材料特性 ............. 5 2.2MOS 理論 ............... 6 第三章元件設計與製作 ............. 18 3-1 結構 ............... 18 3-2 元件製作 .............. 18 3-3 量測機台 .............. 19 第四章結果與討論 ............... 22 4-1 氧化鋅薄膜電晶體 ............. 22 4-2 非揮發氧化鋅快閃記憶體 ........... 33 第五章結論與未來展望 ............. 49 5-1 結論 ............... 49 5-2 未來展望 .............. 49 參考文獻 ................ 51

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