本論文針對高效能運算與共封裝光學（CPO）應用，解決先進面板級封裝（PLP）中因覆蓋 3 µm 聚合物保護層造成垂直大間距，導致傳統線性波導耦合尺寸過長（> 60,000 µm）且受限於 0.09 µm 最小尖端寬度極限而無法使 TM 偏振進行絕熱耦合的瓶頸。研究採用折射率介於矽與聚合物之間的氮化矽（SiN）波導作為過渡中介層以緩解光場束縛，並運用絕熱捷徑（STA）中之快速準絕熱動態（FAQUAD）與絕熱工程（AE）演算法進行波導寬度之非線性調變，均勻化雙偏振之絕熱參數並進一步計算最佳權重分配（62% TE / 38% TM）。模擬結果顯示，完整元件總長度由傳統線性 SiN 設計的 41,737.1 µm 大幅微縮至 2207.1 µm（含區域一 AE 漸變段 2170 µm 與區域二 37.1 µm），尺寸縮短將近 20 倍；在此長度下，TE 與 TM 偏振光之輸出耦合效率分別達到 97% 與 95%。在倒裝晶片製程容限分析中，當水平中心對準誤差達 $pm 2.5 mu ext{m}$ 時耦合效率仍維持在 80% 以上，且正中央旋轉角度容忍度可達 0.2 度（相當於 8 µm 邊緣位移誤差），為次世代高密度三維光學互連網路提供具備高產業實用價值之核心關鍵技術。

This research addresses the bottleneck in advanced panel-level packaging (PLP) for high-performance computing (HPC) and co-packaged optics (CPO) applications, where a 3 μm polymer protective layer creates a large vertical gap. This gap leads to an excessively long coupling footprint (> 60,000 μm) in conventional linear waveguide tapers and prevents the adiabatic coupling of TM-polarized light due to the 0.09 μm minimum tip width limit of current lithography processes.To alleviate optical field confinement, a silicon nitride (SiN) waveguide with a refractive index between silicon and polymer is introduced as a transition interlayer. Furthermore, fast quasi-adiabatic dynamics (FAQUAD) within shortcuts to adiabaticity (STA) and adiabaticity engineering (AE) algorithms are employed to nonlinearly modulate the waveguide width. This homogenizes the adiabatic parameters for dual polarizations and optimizes their weighting distribution (62% TE / 38% TM).Simulation results demonstrate that the total device length is significantly reduced from 41,737.1 μm in the traditional linear SiN design to 2207.1 μm (comprising a 2170 μm AE taper in Region 1 and a 37.1 μm section in Region 2), representing a size reduction of nearly 20 times. At this footprint, the output coupling efficiencies for TE and TM polarizations reach 97% and 95%, respectively. In flip-chip tolerance analysis, the coupling efficiency remains above 80% even under a horizontal alignment offset of up to ±2.5 μm, with a center rotation angle tolerance of up to 0.2° (equivalent to an 8 μm edge displacement error). This work provides a key core technology with high practical industrial value for next-generation high-density 3D optical interconnect networks.

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