本論文研究利用PECVD及金屬橫向結晶(Metal Induced Lateral Crystallization)來低溫(400℃) 成長大面積平面顯示器用奈米矽鍺薄膜電晶體( nc-SiGe TFTs)。不但保有目前非晶矽薄膜技術的優點，而且可以提升其載子遷移率進而提升驅動電流，增加開關電流比。

吾人發展出不同誘發時間下分別在矽基板以及玻璃基板上製作奈米複晶矽鍺薄膜電晶體的最佳製程參數。並利用FE-SEM、AFM觀察薄膜的表面，HP-4145作為電性量測分析，量測TFT Transfer characteristic和I-V curve，以及使用Raman spectra、XRD等儀器分析薄膜的結晶品質。

利用雙重閘極介電層，使在矽基板上nc-SiGe TFTs的載子移動率從0.09 cm2/V-s上升至31.7 cm2/V-s，在玻璃基板上nc-SiGe TFTs也有2.5 cm2/V-s的載子移動率。這些載子移動率遠大於在矽基板上nc-Si TFTs 的18.58 cm2/V-s。

In this thesis, for the first time, we developed the nano silicon germanium thin film transistors (nc-SiGe TFTs) on glass substrate. The nc-SiGe thin films were formed with a novel method of metal induced lateral crystallization (MILC), which is an effective technology and commonly used for preparation low temperature poly silicon films. The nc-SiGe films have a higher mobility than that of amorphous silicon (a-Si) or amorphous silicon germanium (a-SiGe) films, and can be uniformly deposited at low temperature (400℃). The nc-SiGe films growing condition was optimized by tuning a-SiGe depositing temperature in an PECVD system and different MILC anneal time. Furthermore, we also investigated physical and electrical characteristics of the films by FE-SEM, AFM, I/V measurements, Raman spectrum and XRD.
Finally, we prepared the nc-SiGe TFTs with a SiO2/TiO2 stacked gate oxide structure by the optimized condition. The developed nc-SiGe TFT has a typical drift mobility 31.7 cm2/V-s and 2.5 cm2/V-s on Si and glass substrate, respectively. These values are better than that of 18.58 cm2/V-s for a reported nc-Si TFT prepared by HWCVD on Si substrate.

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