近年來，現代 AI 模型的運算需求呈現超越指數的成長，訓練所需的 FLOPS 幾乎每六個月就翻倍。然而，隨著電晶體微縮停滯於 3 nm 節點，僅靠閘極間距的縮減已無法再提供足夠的效能，因此如何繼續提升效能成為一大挑戰。
在低溫下，電路效能顯著提升：提高載子遷移率和導通電流、大幅降低次臨界擺幅，且漏電流大幅降低，整體效能密度因此提高。若將通道材料由矽換成鍺，鍺的電子與電洞的遷移率在低溫下皆有更大幅度的上升，可帶來更高的驅動電流，這些低溫優勢更被放大。因此提供了一個提升效能的方法。
本研究從低溫量測、參數萃取到建立低溫簡易模型。我們使用實驗室建立之 Python 參數萃取平台，以業界常見的元件模型BSIM‑CMG 為基礎，建立了GeOI FinFET 以及GeOI GAAFET 的低溫簡易模型。接著，透過 HSPICE 進行電路模擬，比較不同介面處理(O3, O3/NH3, O3/N2H4)與結構在頻率與功耗上的表現和元件物理特性分析。
最後在完成 GeOI FinFET 的低溫簡易模型後，我們進行後續模型調整，藉以移除外部電阻與介面陷阱等非理想效應，並進行調整後的物理特性分析，來探討鍺通道元件在低溫的電性表現。

In recent years, the compute demand of modern AI models has entered a super‑exponential phase, with training FLOPS now doubling roughly every six months. With transistor scaling stalled at the 3 nm node, gate‑pitch reduction alone can no longer deliver the required performance. This work explores a Beyond‑Moore solution that combines cryogenic operation with germanium‑channel CMOS.
At cryogenic temperatures, circuit performance is markedly enhanced: carrier mobility rises, the sub‑threshold swing steepens, and leakage current plummets—together boosting effective performance density. Substituting germanium for silicon further magnifies these gains, because both electron and hole mobilities experience an even larger cryogenic upturn, delivering higher drive current.
This study completes a comprehensive process from cryogenic measurements to parameter extraction and finally establishes a cryogenic compact model, utilizing the device parameter extraction python platform, building up the cryogenic compact model based on Berkeley Short‑channel IGFET Model – Common Multi‑Gate (BSIM-CMG). Based on experimental data, we established the cryogenic compact models for Germanium-On-Insulator (GeOI) FinFET and GeOI GAAFET. Next, we conducted HSPICE circuit simulations to analyze the frequency and power consumption performance for the different interface treatments (O3, O3/NH3, O3/N2H4) and structures.
After establishing the cryogenic GeOI FinFET compact model, we performed post model adjustment (PMA) to remove non-ideal effects to predict the device’s electrical characteristics.

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