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研究生: 陳昱霖
Chen, Yu-Lin
論文名稱: 異質多核心系統之負偏壓溫度不穩定性感知任務排程框架
NETS: An NBTI-Aware Task Scheduling Framework for Heterogeneous Multicore Systems
指導教授: 林英超
Lin, Ing-Chao
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年: 2020
畢業學年度: 108
語文別: 英文
論文頁數: 40
中文關鍵詞: 異質多核心系統負偏壓溫度不穩定性系統壽命老化減緩
外文關鍵詞: Heterogeneous multicore system, NBTI effects, System lifetime, Aging mitigation
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  • 隨著半導體製程的進展,電晶體的尺寸也不斷的縮小。可靠度成為一個不可忽視的重要問題。其中,負偏壓溫度不穩定性是一個常見且影響很大的可靠度問題。負偏壓溫度不穩定性會使得電晶體的閾值電壓產生飄移,這可能導致時序違規甚至系統故障。許多先前的研究者提出多種技術來減輕負偏壓溫度不穩定性所帶來的影響。但是,這些技術大多應用於同質多核心系統,無法直接應用在異質多核心系統之上。相較於同質多核心系統皆採用相同架構的核心,異質多核心系統可以在高效能與低功耗的核心之間進行選擇,具有較高的彈性同時有更多的設計空間。
    我們透過以上的觀察,在本篇論文中研究了異質多核系統的特性,提出了一種可感知負偏壓溫度不穩定性的框架以提高系統壽命,並且針對不同核心種類採取對應的老化策略。我們針對高效能核心採用不對稱老化方法,此概念可以使一些核心保持健康狀態,以在系統後期處理緊急時限工作。而對於低功耗核心我們採用對稱式老化方法,讓每個核心的老化狀況趨於一致。這樣可以使用更多的低功耗核心共同處理非時限緊急的工作。而工作遷移技術則可以使用不同類型的核心執行單個工作,在功耗與系統壽命之間取得平衡。實驗結果顯示,我們所提出的框架與磨損感知的方法相比,可以實現5.29倍至10.78倍的使用壽命提高,並節省平均功耗11.8%至23.8%。

    With the progress of process technology, the size of transistors has been continuously reduced. Reliability has become a non-negligible issue. The Negative Bias Temperature Instability (NBTI) effect is one of the major reliability threats. The NBTI effect will cause the threshold voltage of the transistor to drift, which may lead to timing violations and even system failures. Many previous researchers have proposed multiple techniques to mitigate the impact of the NBTI effect. However, most of these proposed techniques are applied to homogeneous multicore systems. The heterogeneous multicore systems can trade-off between high-performance big core and low-power LITTLE cores, which is more flexible than the homogeneous multicore systems.
    Through the above observations, in this thesis, we have studied the characteristics of the heterogeneous multicore systems and proposed an NBTI-Aware Task Scheduling Framework (NETS) to improve the system lifetime and adopted corresponding aging strategies for different core types. We propose to adopt an asymmetric aging approach for high-performance big cores. It can reserve some robust cores to deal with critical tasks in the later life stage of the system. For low-power LITTLE cores, we proposed to adopt a symmetric aging approach, which can balance the aging rate of each core. It can keep more low-power LITTLE cores to deal with non-critical tasks. Finally, we propose a task migration mechanism to execute a task on different types of cores. It further trade-off between power consumption and system lifetime. Experimental results show that the proposed framework can achieve a 5.29 times to 10.78 times longer lifetime and save an average power consumption of 11.8\% to 23.8\% when compared to the wearout-aware method.

    摘要i Abstract ii Table of Contents iv List of Tables vi List of Figures vii Chapter 1. Introduction 1 1.1 Background 1 1.2 Main contributions 4 Chapter 2. Preliminaries 6 2.1 Heterogeneous Multicore System 6 2.2 NBTI Model and Prior Works 7 2.3 Symmetric Aging and Asymmetric Aging 11 Chapter 3. Problem Formulation 13 3.1 Heterogeneous Multicore System Model and Real-time Task Model 13 3.2 NBTI-Aware Task Scheduling Problem 16 Chapter 4. NBTI-Aware Task Scheduling Framework 17 4.1 Framework Overview 17 4.2 Task Preprocessing 19 4.3 Task Scheduling 20 4.4 Execution Scenario Classification and Migration Decision 21 4.5 Task-to-core Assignment 22 4.5.1 Task-to-big-core Assignment 22 4.5.2 Task-to-LITTLE-core Assignment 25 4.6 Task Migration 25 4.6.1 Migrate a big task to LITTLE cluster 25 4.6.2 Migrate a LITTLE task to big cluster 29 Chapter 5. Evaluation 30 5.1 Experimental Setup 30 5.2 Lifetime and Energy Evaluation 32 5.3 Effectiveness of Asymmetric Aging 33 5.4 Future Works 37 Chapter 6. Conclusion 38 References 39

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