| 研究生: |
洪晟銘 Hung, Chen-Ming |
|---|---|
| 論文名稱: |
94 GHz 高輸出功率考畢子壓控振盪器與 94 GHz CMOS 正交壓控振盪器研製 Research on 94 GHz High Output Power Colpitts Voltage-Controlled Oscillator and 94 GHz CMOS Quadrature Voltage-Controlled Oscillator |
| 指導教授: |
黃尊禧
Huang, Tzuen-Hsi |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電腦與通信工程研究所 Institute of Computer & Communication Engineering |
| 論文出版年: | 2023 |
| 畢業學年度: | 111 |
| 語文別: | 中文 |
| 論文頁數: | 63 |
| 中文關鍵詞: | 94 GHz 、壓控振盪器 、正交壓控振盪器 |
| 外文關鍵詞: | 94 GHz, CMOS, Quadrature VCO, 40 nm, 90 nm |
| 相關次數: | 點閱:60 下載:25 |
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本論文研製94 GHz高輸出功率考畢子壓控振盪器與94 GHz CMOS正交壓控振盪器,考畢子振盪器採用TSMC 90 nm CMOS製程製作,正交壓控振盪器採用TSMC 40 nm CMOS製程製作。94 GHz高輸出功率考畢子壓控振盪器設計採用汲極至源極回授,偏壓電流透過交互耦合電晶體對實現,可提供正回授以提升整體的迴路增益。透過動態基極偏壓技巧減少電晶體的臨界電壓,振盪器訊號經由回授電容給予基極偏壓,提升電晶體的轉導值,同時加快電流切換電晶體的切換速度,以達到較佳的相位雜訊,並且此技巧可有效提升主動電路所提供的負轉導,來克服考畢子振盪器嚴苛的起振條件。倍頻器之設計採用轉導提升雙推式架構,倍頻器輸出電流的二倍頻項大小由訊號振幅決定,不會被輸出端的高阻抗給抑制,能產生大輸出電壓擺幅去驅動下一級電路。由於振盪器輸出端為倍頻器的共模點,後級電路不會造成考畢子振盪器的負載效應。此倍頻器的電流將再利用於考畢子振盪器,使用電流再利用技巧降低考畢子振盪器的功耗,後級電路使用串接四級共源極的疊接架構以提升振盪器輸出功率此方式能增加在TSMC 90 nm GUTM CMOS製程中電晶體的最大功率增益頻率數值,使整體增益比單純共源級架構來的大,亦能在輸入與輸出端提供良好的隔離度,同時在輸入、輸出及級間匹配上採用能達到較小面積的匹配網路; 94 GHz CMOS正交壓控振盪器。諧振槽的設計採用可變電容串聯自製MOM電容與中央抽頭電感來使振盪頻率提高至94 GHz,輸出端串接一級緩衝器,振盪器需要緩衝器來改善負載與振盪器隔離度,並且提升振盪器輸出功率。晶片電路設計皆以Agilent ADS、Cadence Virtuoso與全波電磁模擬軟體進行模擬,量測皆採用on-wafer方式進行。
This thesis investigates a 94 GHz high-output-power Colpitts voltage-controlled oscillator (VCO) and a 94 GHz CMOS quadrature voltage-controlled oscillator. The research focuses on the circuit design and implementation of two CMOS millimeter-wave oscillator chips using the TSMC 90 nm GUTM CMOS process and the TSMC 40 nm CMOS process, respectively. In the First part, the motivation behind the design of the 94 GHz high-output-power Colpitts VCO is the request of its application in an asymmetric up/down-conversion double-balanced mixer for a RF transceiver. The design achieves the 94 GHz target frequency through frequency doubling skill, with a fundamental differential Colpitts VCO. The small-signal transconductance of the transistors is enhanced using forward body biasing techniques. The frequency doubler employs a transconductance boosting technique, where the differential ends of the oscillator are connected in antiphase to the gate and source terminals of the doubler, resulting in an increased voltage difference across the gate and source terminals. The next stage in the circuit is an amplifier, implemented using a cascaded four-stage configuration to increase the output power of the oscillator. Since the output of the frequency doubler is the common-mode node of the oscillator, the subsequent stages will not affect the operation of the baseband oscillator. The 94 GHz high-output-power Colpitts VCO operates at a center frequency of 94.08 GHz, with a tunable bandwidth of 2.25 GHz. The phase noise at offsets of 1 MHz and 10 MHz are -73.27 dBc/Hz and -108.37 dBc/Hz, respectively. The corresponding output power is 1.87 dBm, and the figure of merit (FOM) is -174.03.
The second part of this thesis focuses on the design of a 94 GHz CMOS quadrature VCO. The circuit consists of two sets of oscillators and buffers, and it utilizes custom-made metal-oxide-metal (MOM) capacitors in series to increase the output frequency. By injecting signals into each other differential cores, four-phase signals are obtained. The core currents of the 94 GHz CMOS quadrature VCO are 33.5 mA and 32.4 mA, and the buffer currents are 11.1 mA, 10.5 mA, 12.5 mA, and 11.5 mA, with a center frequency shift to 74.9 GHz and a tunable bandwidth of 2.31 GHz. The phase noise at offsets of 1 MHz and 10 MHz are -84.62 dBc/Hz and -108.13 dBc/Hz, respectively. The corresponding output power is -20.98 dBm, and the FOM is -166.02.
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