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研究生: 林家弘
Lin, Chia-Hung
論文名稱: 具鈮酸鋰/氧化鉿/三氧化二鋁堆疊式閘極氧化層之氮化鋁鎵/氮化鎵多重通道增強式金氧半高電子遷移率場效電晶體之特性研究
Performance Investigation of AlGaN/GaN Multiple Channel E-Mode MOS-HEMTs with LiNbO3/HfO2/Al2O3 Gate Dielectric Stack
指導教授: 李清庭
Lee, Ching-Ting
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2020
畢業學年度: 108
語文別: 中文
論文頁數: 91
中文關鍵詞: 氮化鋁鎵/氮化鎵雷射干涉微影技術光電化學法多重通道結構堆疊式氧化層閘極掘入鈮酸鋰增強式金氧半高電子遷移率場效電晶體
外文關鍵詞: AlGaN/GaN, laser interference photolithography, gate dielectric stack, multiple channel structure, initialization, LiNbO3, enhancement mode HEMTs
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  • 氮化鋁鎵/氮化鎵半導體因其材質特性而形成具高濃度二維電子氣之通道,然而因氮化鋁鎵/氮化鎵半導體結構其具有之二維電子氣通道使得以此半導體製作氮化鎵場效電晶體多著重於空乏型(depletion mode)元件,意味著即便閘極偏壓為零時,通道中仍有電流流通,如果元件長期使用造成閘極損壞,通道無法關閉使得輸入端電流直接流向輸出端,可能會造成與輸出端連接之電路壞死,而增強型元件因其常關特性可使電路於安全考量上具有必要性,亦可使電路設計更具多元化,因此該方向之研發值得探究。在本論文中,當以此氮化鋁鎵/氮化鎵半導體材料製作具多重通道之堆疊式閘極氧化層增強型(enhancement mode)之金氧半高電子遷移率場效電晶體(MOS-HEMTs)。
    於堆疊式閘極氧化層部分,本論文利用三氧化二鋁、氧化鉿及鈮酸鋰依序作分別作為電子穿隧層、電荷捕捉層以及電荷阻擋層,並藉由其結構之特性施加初始化電壓使二維電子氣通道中之載子受到電場吸引而困於電荷捕捉層使元件易於空乏通道使得元件之臨界電壓(threshold voltage, VTH)獲得大幅度之正偏移以完成元件之增強型操作。多重通道結構的部分本論文採用雷射干涉微影技術並結合光電化學(photoelectrochemical, PEC)蝕刻法實現出條紋柵狀之多條通道,此結構能夠加大閘極兩側與通道的接觸範圍,使施加於閘極之電場能大幅增加,使得施加相同之初始化電壓下臨界電壓的正偏移幅度更提升外也能因增加了閘極控制力而提升最大轉移電導值(gm(max))、降低次臨界擺幅(subthreshold swing , S.S.)、減少元件閘極漏電以及改善其高頻表現特性。
    為了使堆疊式氧化層元件能夠更有效地完成增強型操作,利用光電化學蝕刻法進行閘極掘入,降低異質接面中之載子通道內的電子濃度,同時更加強閘極之控制能力,並藉由脈衝雷射沉積技術(pulsed laser deposition technique)將鈮酸鋰(Lithium Niobate, LiNbO3)鐵電薄膜應用於堆疊式閘極氧化層之最上層,結合堆疊式結構、閘極掘入結構及該鐵電薄膜之壓電極化效應以空乏二維電子氣通道,完成增強型高速電子遷移率電晶體。

    In this study, we fabricated multiple channel enhancement mode metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) with LiNbO3/HfO2/Al2O3 gate dielectric stack on AlGaN/GaN substrate. We used laser interference photolithography method and photoelectronchemical wet etching to accomplish multiple channel structure. This structure could improve performances of MOS-HEMTs such as higher threshold voltage, higher maximum transconductance, lower subthreshold swing, smaller gate leakage current, better frequency performances and lower knee voltage by increasing contact area between sidewalls of gate and channel which could substantially increase the electric field of gate bias voltage. Gate dielectric stack structure could greatly shift threshold voltage of the device by applying an initialization voltage to gate electrode and change from D-mode operation to E-mode operation. Multiple nanochannel array structure also could make the initialization process much more effective because of better gate controllability. The AlGaN/GaN heterostructure with the two dimensional electron gas channel generally formed depletion mode transistors. To fabricate enhancement mode transistors, we used gate dielectric stack with ferroelectric LiNbO3 film as top oxide layer using a pulsed laser deposition system to deplete the polarization of AlGaN/GaN heterostructure. Finally, we successfully fabricated multiple channel enhancement mode metal-oxide-semiconductor high-electron-mobility transistors by applying gate dielectric stack with ferroelectric LiNbO3 film and multiple channel structure.

    摘要......II Abstract......IV 致謝......XII 第一章 簡介......1 1.1 氮化鋁鎵/氮化鎵高電子遷移率場效電晶體......1 1.2 研究動機......2 1.3 論文架構......4 圖表......4 參考文獻...... 9 第二章 原理與文獻回顧......13 2.1氮化鋁鎵/氮化鎵異質接面結構......13 2.1.1 氮化鋁鎵/氮化鎵異質結構成長方式......13 2.1.2 二維電子氣通道之特性......13 2.2 氮化鋁鎵蝕刻原理......14 2.2.1 光電化學法(蝕刻)......14 2.3 增強型金氧半高電子遷移率場效電晶體介紹......15 2.3.1 增強型元件......15 2.4 鈮酸鋰鐵電薄膜介紹......16 2.4.1 介電材料之極化機制......16 2.4.2 鈮酸鋰薄膜基本性質......17 2.5 堆疊式三層閘極氧化層......19 2.5.1 堆疊式閘極結構發展與原理......19 2.5.2 Fowler-Nordheim穿隧機制(F-N tunneling)......20 2.6 奈米級多通道結構......20 2.6.1 奈米級多通道結構介紹......20 圖表......22 參考文獻 ......28 第三章 元件製程及量測儀器......34 3.1 試片結構......34 3.2 元件製備流程......34 3.2.1多重通道結構圖型定義......34 3.2.2高台隔離製作......36 3.2.3 硫化表面處理......38 3.2.4 歐姆接觸電極......38 3.2.5 閘極掘入......40 3.2.6 堆疊式閘極氧化層製作......41 3.2.7 閘極金屬製作......41 3.3 製程及量測儀器介紹......42 3.3.1 雷射干涉微影系統......42 3.3.2 原子層沉積系統......43 3.3.3 脈衝雷射沉積系統......43 3.3.4 電子束蒸鍍系統......44 3.3.5 DC電流-電壓量測系統......44 3.3.6 功率元件量測系統......44 3.3.7 元件高頻 S參數量測系統......45 3.3.8 高解析穿透式電子顯微鏡......45 圖表......46 參考文獻...... 56 第四章 實驗結果與討論......58 4.1鈮酸鋰薄膜之量測分析......58 4.1.1薄膜X光繞射量測分析......58 4.1.2薄膜PFM極化特性分析......59 4.2單通道單層閘極氧化層增強型高速電子遷移率場效電晶體 59 4.2.1單層鈮酸鋰閘極氧化層結合光電化學蝕刻法完成增強型元件......60 4.2.2單通道單層閘極氧化層增強型元件直流特性量測 ......60 4.2.3單通道單層閘極氧化層增強型元件之閘極漏電流及崩潰電壓量測......61 4.2.4單通道單層閘極氧化層增強型元件之高頻特性量測......61 4.3單通道堆疊式三層閘極氧化層增強型高速電子遷移率場效電晶體......62 4.3.1單通道堆疊式三層閘極氧化層增強型元件直流特性量測......63 4.3.2單通道堆疊式三層閘極氧化層增強型元件之閘極漏電流及崩潰電壓量測......64 4.3.3單通道堆疊式三層閘極氧化層增強型元件之高頻特性量測...... 64 4.4具多重通道(500 nm)堆疊式三層閘極氧化層增強型高速電子遷移率場效電晶體...... 65 4.4.1具多通道(500 nm)堆疊式三層閘極氧化層增強型元件直流特性量測......65 4.4.2具多通道(500 nm)堆疊式三層閘極氧化層增強型元件之閘極漏電流及崩潰電壓量測......68 4.4.3具多通道(500 nm)堆疊式三層閘極氧化層增強型元件之高頻特性量測......68 圖表......70 參考文獻...... 87 第五章 結論......90

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    [8] C. H. Choi and C. J. Kim, “Fabrication of a dense array of tall nanostructures over a large sample area with sidewall profile and tip sharpness control,” Nanotechnology, vol. 17, pp. 5326-5333, 2006.
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    [10] J. W. Son, S. S. Orlov, B. Phillips and L. Hesselink, “Pulsed laser deposition of single phase LiNbO3 thin film waveguides,” J. Electroceram., vol. 17, pp. 591-595, 2006.
    [11]S. Higuchi and I. Tsukada, “Pulsed-laser deposition of LiNbO3 thin films at low oxidation gas pressure with pure Ozone,” Jpn. J. Appl. Phys., vol. 42, pp. L1066-L1068, 2003.
    [12]J. Gonzalo, C. N. Afonso, J. M. Ballesteros, A. Grosman and C. Ortega, “Li deficiencies in LiNbO3 films prepared by pulsed laser deposition in a buffer gas,” J. Appl. Phys., vol. 82, pp. 3129-3133, 1997.
    [13] H. H. Rose, “Optics of high-performance electron microscopes” Sci. Technol. Adv. Mater., vol. 9, 014107, 2008.
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    [4] S. J. Lee and C. R. Crowell, “Parasitic source and drain resistance in high-electron-mobility transistor,” Solid-State Electron., vol. 28, pp.659-668, 1985.
    [5] Q. Z. Liu, L. S. Yu, F. Deng, S. S. Lau, Q. Chen, J. W. Yang and M. A. Khan, “Study of contact formation in AlGaN/GaN heterostructures,” Appl. Phys. Lett., vol. 71, pp. 1658-1660, 1997.
    [6] M. E. Lin, Z. Ma, F. Y. Huang, Z. F. Fan, L. H. Allen and H. Morkoç, “Low resistance ohmic contacts on wide band-gap GaN,” Appl. Phys. Lett., vol. 64, pp. 1003-1005, 1994.
    [7] M. Kanamura, T. Ohki, T. Kikkawa, K. Imanishi, T. Imada, A. Yamada and N. Hara, “Enhancement-mode GaN MIS-HEMTs with n-GaN/i-AlN/n-GaN triple cap layer and high-k gate dielectrics,” IEEE Electron Device Lett., vol. 31, pp. 189-191, 2010
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    [9] J. D. Boor, N. Geyer, U. Gösele and V. Schmidt, “Three-beam interference lithography:upgrading a Lloyd’s interferometer for single-exposure hexagonal patterning,” Opt. Lett., vol. 34, pp. 1783-1785, 2009.
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    [11]S. Higuchi and I. Tsukada, “Pulsed-laser deposition of LiNbO3 thin films at low oxidation gas pressure with pure Ozone,” Jpn. J. Appl. Phys., vol. 42, pp. L1066-L1068, 2003.
    [12]J. Gonzalo, C. N. Afonso, J. M. Ballesteros, A. Grosman and C. Ortega, “Li deficiencies in LiNbO3 films prepared by pulsed laser deposition in a buffer gas,” J. Appl. Phys., vol. 82, pp. 3129-3133, 1997.
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    第四章
    [1] C. T. Lee, C. L. Yang, C. Y. Tseng, J. H. Chang, R. Y. Horng “GaN-Based Enhancement-Mode Metal–Oxide–Semiconductor High-Electron Mobility Transistors Using LiNbO3 Ferroelectric Insulator on Gate-Recessed Structure,” IEEE Trans. Electron Devices, vol. 62, pp. 2481-2487, 2015.
    [2] L. H. Huang and C. T. Lee, “Investigation and analysis of AlGaN MOS devices with an oxidized layer grown using the photoelectrochemical oxidation method,” J. Electrochem. Soc., vol. 154, pp. H862-H866, 2007.
    [3] B. Lee, C. Kirkpatrick, Y. H. Choi, X. Y. Y, A. Q. H, and V. Misra, “Normally‐off AlGaN/GaN MOSHFET using ALD SiO2 tunnel dielectric and ALD HfO2 charge storage layer for power device application,” Phys. Status Solidi C., vol. 9, pp. 868-870, 2012.
    [4] B. Lee, C. Kirkpatrick, Y. Xiangyu, S. Jayanti, R. Suri, J. Roberts and V. Misra, " Normally-Off AlGaN/GaN-on-Si MOSHFETs with TaN floating gates and ALD SiO2 tunnel dielectrics ", IEDM Tech. Dig., pp. 20.6.1-20.6.4, 2010.
    [5] C.T. Lee, Y.L. Chiou, “Photoelectrochemical oxidation-treated AlGaN/GaN metal-oxide-semiconductor highelectron mobility transistors with oxidized layer/Ta2O5/Al2O3 gate dielectric stack” Appl. Phys. Lett., vol.103, 082104, 2013.

    [6] K. Ohi, J. T. Asubar, K. Nishiguchi and T. Hashizume, “Current stability in multi-mesa-channel AlGaN/GaN HEMTs,” IEEE Trans. Electron Devices, vol. 60, pp. 2997-3004, 2013.
    [7] K. Ohi and T. Hashizume, “Drain current stability and controllability of threshold voltage and subthreshold current in a multi-mesa-channel AlGaN/GaN high electron mobility transistor,” Jpn. J. Appl. Phys., vol. 48, pp. 081002-1-081002-5, 2009.
    [8] K. Ohi and T. Hashizume, “Reduction of current collapse in the multi-mesa-channel AlGaN/GaN HEMT,” Phys. Status Solidi C, vol. 9, pp. 899-902, 2012.
    [9] M. Alsharef, M. Christiansen, R. Granzner, E. Ture, R. Quay, O. Ambacher and F. Schwierz, “RF performance of trigate GaN HEMTs,” IEEE Trans. Electron Devices, vol. 63, pp. 4255-4261, 2016.
    [10] W. B. Lanford, T. Tanaka, Y. Otoki, I. Adesida, “Recessed-gate enhancement-mode GaN HEMT with high threshold voltage,” Electron. Lett., vol. 41, pp. 449-450, 2005.
    [11] T. E. Hsieh, E. Y. Chang, Y. Z. Song, Y. C. Lin, H. C. Wang, S. C. Liu, S. Salahuddin and C. C. Hu, “Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer,” IEEE Electron Device Lett., vol. 35, pp. 732-734, 2014.
    [12] Y. Cai, Y. Zhou , K. J. Chen and K. M. Lau, “High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment,” IEEE Electron Device Lett., vol. 26, pp. 435-437, 2005
    [13] H. Huang, Y. C. Liang, G. S. Samudra and C. L. L. Ngo, “Au-Free Normally-Off AlGaN/GaN-on-Si MIS-HEMTs Using Combined Partially Recessed and Fluorinated Trap-Charge Gate Structures,” IEEE Electron Device Lett., vol. 35, pp. 569-571, 2014.
    [14] O. Hilt, R. Zhytnytska, J. Bocker. E. Bahat-Treidel, F. Brunner, A. Knauer, S. Dieckerhoff and J. Wurfl, “70 mΩ/600 V normally-off GaN transistors on SiC and Si substrates,” IEEE 27th ISPSD, pp. 237-240, 2015.
    [15] O. Hilt, A. Knauer, F. Brunner, E. Bahat-Treidel and J. Wurfl, “Normally-off AlGaN/GaN HFET with p-type Ga Gate and AlGaN buffer,” IEEE 22nd ISPSD, pp. 347-350, 2010.

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