氧化銦鎵鋅薄膜電晶體，因具有應用於液晶面板上做為驅動與畫素開關元件之潛力，以及適合應用於具新穎性全透明電路與軟性電子上，目前己引發熱烈的研究。然而，一般氧化銦鎵鋅薄膜電晶體於閘極電壓為零時發現有大量漏電流的缺點，使其在應用上仍有限制。其主要原因係因一般氧化物半導體缺少p型材料，無法形成p-n接面，沒有足夠大的電子能障抵擋漏電流。為了克服此問題，本研究在元件結構上加上電子阻障層，來抵擋其漏電流。本論文共濺鍍方式混和氧化銦鎵鋅與氧化錫材料形成氧化錫銦鎵鋅，以此化合物作為電子阻障層來製作氧化銦鎵鋅薄膜電晶體。
本研究針對三種不同結構對薄膜電晶體的特性影響進行探討，分別為一般結構、電子阻障結構及雙通道結構。以氮化鉭作為金屬閘極材料，搭配氧化矽鉿作為閘極介電層來製作氧化銦鎵鋅薄膜電晶體。同時製作氮化鉭/氧化矽鉿/鋁結構的金屬/絕緣層/金屬(Metal-Insulator-metal, MIM)電容來評估氧化矽鉿的值與薄膜電晶體之載子遷移率。物性分析方面利用X光繞射分析(XRD)與化學分析電子儀(XPS)分析氧化銦鎵鋅、氧化錫銦鎵鋅、氧化矽鉿薄膜。於元件特性比較上，以沉積22 nm的氧化銦鎵鋅通道搭配沉積250 nm的氧化錫銦鎵鋅電子阻障層之元件特性表現最好。實驗結果顯示最佳之電晶體之開關電流比高達1.87×106，由IDS-VGS萃取出臨界電壓約為0.55V，次臨界擺幅為0.077 V/decade，而通道中的載子遷移率為13.39 cm2V-1s-1。
由實驗結果顯示，以氧化錫銦鎵鋅為電子阻障之結構，極適用於改善氧化銦鎵鋅薄膜電晶體之漏電流問題，對於未來商用TFT-LCD與軟性電子之應用深具潛力◦

InGaZnO (IGZO) thin-film-transistors (TFTs) have attracted considerable attention due to their potentials for next generation liquid crystal display switch devices and transparent and flexible electronics. However, IGZO TFTs are suffered with high leakage currents at VG = 0 which limits their applications in microelectronics and optoelectronics. This issue mainly results from the lack of p-type oxide semiconductors, hence there is no p-n junction to provide a suitable electron barrier height to suppress leakage current. To overcome the problem, electron barrier layer (EBL) was proposed to reduce leakage current in this work. In the present work, sputtering-deposited SnInGaZnO (SIGZO) film obtained from co-sputtering of InGaZnO and SnO was employred as the EBL for the fabrication of IGZO TFTs.
In this thesis, IGZO TFTs with tantalum nitride (TaN) and hafnium silicon oxide (HfSiO) as the gate electrode and gate insulator, respectively, were fabricated and characterized. The influences of three different structures (regular structure, electron barrier layer structure, and double active layer structure) on TFT characteristics were investigated. MIM capacitors with TaN/HfSiO/Al structure were also prepared to evaluate the dielectric constant of high-material and channel mobility. The physical properties and compositions of IGZO, SIGZO, and HfSiO films were examined by SEM, XRD, and XPS analysis. According to experimental Ids-Vds and Ids-Vgs characteristies of the prepared TFTs, it suggests that with the optimized IGZO thickness of 22 nm and the SIGZO electron barrier layer thickness of 250 nm, the remarkable device performances would be obtained. The Ion/Ioff ratio, threshold voltage, subthreshold swing, and mobility obtained from the fabricated IGZO-TFTs with electron barrier layer structure were 1.87×106, 0.55 V, 0.077 V/dec, and 13.39 cm2V-1s-1, respectively. Our experimental results reveals that the SnInGaZnO electron barrier layer structure work well for future InGaZnO-TFTs which have potentials for liquid crystal displays and novel flexible electronics applications.

[1] G. H. Heilmeier, L. A. Zanoni, L. A. Barton, “Dynamic scattering-A new electrooptic effect in nematic liquid crystals,” Proceedings of the IEEE, Vol. 56, pp. 1162-1171, 1968.
[2] T. P. Brody, J. A. Asars, G. D. Dixon,“A 6 × 6 inch 20 lines-per-inch liquid-crystal display panel,” IEEE Trans. on Electron Devices, Vol. 20, pp. 995-1001, 1973.
[3] H. Kimura, T. Maeda, T. Tsunashima, T. Morita, H. Murata, S. Hirota, H. Sato, “A 2.15 inch QCIF reflective color TFT-LCD with digital memory on glass (DMOG),” Proceedings of the SID, pp. 268-270, 2001.
[4] S. B. Ogale, Thin films and heterostructures for oxide for oxide electronics, New York, NY: Springer, 2005.
[5] C. Jagadish and S. Pearton, Zinc oxide bulk, thin films and nanostructure, Oxford, UK: Elsevier, 2006.
[6] U. Ozgur, Y. I. Alivov, C. Liu, A. Teke,M. A. Reshchikov, S. Dogan,V. Avrutin, S.-J. Cho, and H. Morkoc, "A comprehensive review of ZnO materials and devices," J. Appl. Phys., Vol. 98, pp. 041301-1–041301-103, Aug. 2005.
[7] A. Janotti and C. G. Van de Walle, “Fundamentals of zinc oxide as a semiconductor,” Rep. Prog. Phys., Vol. 72, pp.126501-1–126501-29, Oct. 2009.
[8] Peardon’s Handbook of Crystallograpphic Data, pp. 2795-2796.
[9] D. J. Leary, J. O. Barnes, and A. G. Jordan,“Calculation of Carrier Concentration in Polycrystalline Films as a Function of Surface Acceptor State Density: Application for ZnO Gas Sensors,＂J. Electrochem. Soc, Vol. 129, pp. 1382-1387, 1982.
[10] G. Neumann,“On the Defect Structure of Zinc-Doped Zinc Oxide,＂Phys. Status Solids(b), Vol. 105, pp. 605-612, 1981.
[11] H. Hosono, "Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application," J. Non-Cryst. Solids, Vol. 352, pp. 851–858, Jun. 2006.
[12] T. Kamiya, K. Nomura, and H. Hosono, “Origins of high mobility and low operation voltage of amorphous oxide TFTs: Electronic structure, electron transport, defects and doping,” J. Disp. Technol., Vol. 5, no. 7, pp. 273–288, Jul. 2009.
[13] K. Nomura, A. Takagi, T. Kamiya, H. Ohta, M. Hirano and H. Hosono, "Amorphous oxide semiconductors for high-performance flexible thin-film transistors," Jpn. J. Appl. Phys., Vol. 45, no. 5B, pp. 4303–4308, May 2006.
[14] Tze-Ching, Chiao-Shun Chuang, Kenji Nomura, Han-Ping David Shieh, Hideo Hosono, and Jerzy Kanicki, “Photofield-Effect in Amorphous In-Ga-Zn-O (a-IGZO) Thin-Film Transistors,” Journal of Information Display, Vol. 9, no. 4, December 2008.
[15] Minkyu Kim, Jong Han Jeong, Hun Jung Lee, Tae Kyung Ahn, Hyun Soo Shin, Jin-Seong Park, Jae Kyeong Jeong, Yeon-Gon Mo, and Hye Dong Kim, “High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper,” App. Phy. Lett. Vol. 90, p. 212114, 2007.
[16] Chiao-Shun Chuang, Tze-Ching Fung, Barry G. Mullins, Kenji Nomura, Toshio Kamiya, Han-Ping David Shieh, Hideo Hosono, and Jerzy Kanicki, “Photosensitivity of Amorphous IGZO TFTs for Active-Matrix Flat-Panel Displays,” SID 08 DIGEST, 1215.
[17] N. C. Su, S. J. Wang, and Albert Chin, “High-Performance InGaZnO Thin-Film Transistors Using HfLaO Gate Dielectric” IEEE Electron Device Letters, Vol. 30, No.12, pp. 1317-1319, Dec. 2009.
[18] Keun Woo Lee, Kon Yi Heo, Sang Hoon Oh, Abderrafia Moujoud, Gun Hee Kim, Hyun Jae Kim, “Thin film transistors by solution-based indium gallium zinc oxide/carbon nanotubes blend,” Thin Solid Films, Vol. 517, pp. 4011-4014, 2009.
[19] G. Neumann,“On the Defect Structure of Zinc-Doped Zinc Oxide,＂Phys. Status Solids(b), Vol. 105, pp. 605-612, 1981.
[20] B. Cheng, M. C. Cao, R. Rao, A. Inani, P. V. Voorde, W. M. Greene, J. M. Stork, M. Zeitzoff, and J. C. Woo, “The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs,” IEEE Trans. Electron Devices Vol. 46, pp. 1537-1544, 1999.
[21] V. Mikhelashvili, and G. Eisenstein, “Effects of annealing conditions on optical and electrical characteristics of titanium dioxide films deposited by electron beam evaporation,” Appl. Phys. Lett., Vol. 89, pp. 3256-3269, 2001.
[22] M. H. Cho, Y. S. Roh, C. N. Whang, K. Jeong, S. W. Nahm, D. H. Ko, J. H. Lee, N. I. Lee, and K. Fujihara, “Thermal stability and structural characteristics of HfO2 films on Si (100) grown by atomic-layer deposition,” Appl. Phys. Lett., Vol. 81, pp. 472-474, 2002.
[23] S. M. Hu, “Stress-related problems in silicon technology,” Appl. Phys. Lett., Vol. 706, pp. 53-80, 1991.
[24] T. M. Klein, D. Niu, W. S. Epling, W. Li, D. M. Maher, C. C. Hobbs, R. I. Hegde, I. J. R. Baumvol, and G. N. Parsons, “Evidence of aluminum silicate formation during chemical vapor deposition on amorphous Al2O3 thin films on Si (100),” Appl. Phys. Lett., Vol. 75, pp. 4001- 4003, 1999.
[25] H. F. Luan, S. J. Lee, S. C. Song, Y. L. Mao, Y. Senzaki, D. Roverts, and D. L. Kwong, “Effect of Interface Oxide Layer on HfO2 Gate Dielectrics,” IEDM Tech. Dig., Vol. 34, pp. 141-142, 1999.
[26] K. J. Hubbard, and D. G. Schlom, “Thermodynamic stability of binary oxides in contact with silicon,” J. Mater. Res., Vol. 11, pp. 2757-2776, 1996.
[27] Li-ping Feng, Zheng-tang Liu, Ya-Ming Shen, “Compostiional, structural and electronic characteristics of HfO2 and HfSiO dielectrics prepared by radio frequency magnetron sputtering,” Vaccum, Vol. 83, pp. 902-905, 2009.
[28] J. Robertson, “Band offsets of wide-band-gap oxides and implications for future electronic devices,” J. Vac .Sci. Technol. B, vol. 18, pp. 1785-1791, 2000.
[29] Y. C. Yeo, “Metal gate technology for nanoscaletransistors-materials election and process integration issues,” Thin Solid Films, Vol. 34, pp. 462-463, 2004.
[30] F. Boeuf, H. S. P. Wong, J. A. Hutchby, T. Skotnicki, and T. J. King, “The end of CMOS Scaling,” IEEE circuits & devices magazine, Vol. 5, pp. 16-26, 2005.
[31] K. A. Ellis, and R. A. Buhrman, “Boron diffusion in silicon oxides and oxynitrides,” J. Electrochem. Soc. Vol. 145, pp. 2068-2069, 1998.
[32] B. E. Deal, “Standardized terminology for oxide charges associated with thermally oxidized silicon,” IEEE Trans. Electron Devices, pp. 27-28, 1980.
[33] D. K. Schroder, “Semiconductor material and device characterization,” 2nd edition, Wiley, New York, pp. 367-369, 1998.
[34] M. Zambuto, “Semiconductor Devices,” McGraw-Hill Book Company, Ch. 9, pp. 284-332.
[35] A. Goetzberger, E. Klausmann, and M. J. Schulz, “Interface states on semiconductor/insulator interface,” CRC Crict. Rev. Solid State Sci., 6, pp. 41-43, 1976.
[36] M. Koyama, Y. Kamimuta, T. Ino, A. Nishiyama, A. Kaneko, S. Inumiya, K. Eguchi, and M. Takayanagi, “Careful examination on the asymmetric VFB shift problem for poly-Si/HfSiON gate stack and its solution by the Hf concentration control in the dielectric near the poly-Si interface with small EOT expense,” IEDM Tech. Dig., pp. 499-502, 2004.
[37] H. Yamada, T. Shimizu, A. Kurokawa, and K. Ishii, “MOCVD of High-Dielectric-Constant Lanthanum Oxide Thin Films,” J. Electrochem. Soc., Vol. 150, pp. 429-435, 2003.
[38] N. Zhan, M. C. Poon, C. W. Kok, K. L. Ng, and H. Wong, “XPS study of the thermal instability of HfO2 prepared by RF sputtering in oxygen with RTA,” J. Electrochem. Soc., Vol. 150, pp. F200-F202, 2003.
[39] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 548-550.
[40] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 529-530.
[41] P. Barquinha, L. Pereira, G. Gonçalves, R. Martins, and E. Fortunato, “Toward High-Performance Amorphous GIZO TFTs,” Jour. Elec. Soc., Vol. 156, no. 3, pp. H161-H168, 2009.
[42] Y. Wang, X. W. Sun, G. K. L. Goh, H. V. Demir, and H. Y. Yu, “Influence of Channel Layer Thickness on the Electrical Performances of Inkjet-Printed In-Ga-Zn Oxide Thin-Film Transistors,” IEEE Trans. on Electron Devices, Vol. 58, No. 2, pp. 480-485, 2011.
[43] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 475-476.
[44] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 451.
[45] 陳志強, LTPS低溫複晶矽顯示技術, 全華, 2004.
[46] S. M. Sze, “Semiconductor Devices,” 2nd edition, John Wiley & Sons, Ch. 6, pp. 188.
[47]曾伯霜, “JSM-6700F HR-FESEM Opearation Manual,” Department of Chemical Engineering National Cheng Kung University.
[48] John C. Vickerman, “Surface Analysis-The Principal Techniques,” John Wiley & Sons, Ch. 3, pp. 45.
[49] H. R. Huff, L. Fabry, S. Kishino, “Semiconductor silicon 2002,” The Electrochemical Society, pp. 741-742.