| 研究生: |
蔡維民 Tsai, Wei-Ming |
|---|---|
| 論文名稱: |
CMOS影像感測器薄膜堆疊結構模擬分析 Simulation of Film Structure for CMOS Image Sensor |
| 指導教授: |
李輝煌
Lee, Huei-Huang |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 工程科學系 Department of Engineering Science |
| 論文出版年: | 2011 |
| 畢業學年度: | 99 |
| 語文別: | 中文 |
| 論文頁數: | 79 |
| 中文關鍵詞: | 互補式金氧半導體 、背光照度技術 、薄膜應力 、漏電流 、有限元素分析 |
| 外文關鍵詞: | CMOS, BSI, Film Stress, Leakage Current, Finite Element Analysis |
| 相關次數: | 點閱:136 下載:0 |
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影像感測器為數位相機、行動電話等3C產品之核心,近年來影像感測器的技術開發也持續朝向高畫素、高畫質、省電、體積小發展。其中以CMOS影像感測器為製程主流,利用減少感光元件上方層狀結構數目,以增加感光效率提升畫素性能,透過BSI (Back Side Illumination)背光照度技術,增加每單位面積的敏感度、改進亮度的效率與降低光學反應不一致性的問題,然而影像感測器交界處的漏電流問題對元件影響也必須去衡量。
本論文將利用既有的商用有限元素分析軟體ANSYS來進行模擬,模擬CMOS影像感測器薄膜堆疊製程,例如彩色濾光片堆疊過程,並把有限元素分析結果與元件中所量測之漏電流進行比較,觀察不同的堆疊結構與電子特性(漏電流)之間的關係,並利用分析結果進一步優化薄膜堆疊結構或更改薄膜材料,以達到最佳性能。模擬過程中主要透過2D模擬並簡化幾何結構可以大幅度提升模擬效率,並且修正材料參數和探討應力奇異點讓模擬結果更為精確。
從研究結果發現,因材料彼此之間的熱膨脹係數不同,在降溫到室溫的過程中會產生殘留應力。模擬分析結果也顯示出不同薄膜堆疊結構的殘留應力分佈情況亦不同,並與實驗結果比較後發現,當應力越小漏電流越小;應力越大則漏電流越大。針對此趨勢,其原因應該是高應力會使結構產生缺陷,造成界面處或是基材的電子受到缺陷的影響,進而產生漏電流。目前在有限元素分析與漏電流的相關文獻非常稀少,相信這樣的研究成果可以協助半導體製造商在開發上來達到縮短技術開發時間、減少實驗成本支出、提高成品良率的目標。
Image sensor is one of the core components of 3C products. In recent years, image sensor technologies have direction developed toward the higher resolution, high-quality, lower power consumption and smaller size. CMOS image sensor which increases the performance of light-sensitive pixel efficiency by reducing the number of layer structures above the photosensitive sensor is the mainstream of process. BSI (Back Side Illumination) technique is also used by engineers to increase the sensitivity on unit area of CMOS, improve brightness efficiency and solve the problem that photographic reaction is inconsistent. However, engineers must also have to assess the influence of leakage current on the junctions between image sensors.
This study will use ANSYS, the commercial finite element analysis software, to simulate the thin film stacked in different processes on CMOS image sensors. For example, the process of color filter stacks will observe the impact with the different stacking structure and electronic properties (leakage current) , and using the results to further optimize the structure of thin film stacked or change the film material to achieve the best performance. We use 2D simulation and simplification model to improve simulation efficiency, then modifying material parameters and discussing with stress singularity will get more accurate results.
From the study, the film structure will produce residual stress when cooling to room temperature because of materials with the different coefficients of thermal expansion. Comparing of simulation and experiment results will find a trend: When the stress is higher and the leakage is higher; the stress is lower and the leakage is lower. This trend caused by the high stress induced defects, then defects induced high leakage current. The study will use the computer simulation to make the shorter research time, lower experimental costs, and enhancing the defect-free rate of products.
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校內:2021-01-01公開