隨著科技不斷進步，數位相機的發展已經越來越進步，其中包含了許多數位影像處理的技術。在數位相機影像重建的過程中，彩色濾波陣列插補法或稱解馬賽克法可說是最重要的技術之一。近年來有一些相關演算法被提出，分成自定義演算法和基於機器學習的演算法，由於基於機器學習的演算法計算複雜度過高且處理速度慢，較無法應用於即時處理的裝置上，而自定義演算法又可分為需要較高的儲存空間來得到較好的影像品質的演算法以及計算複雜度低且成本低易實作成硬體的演算法，後者更適合應用於即時處理嵌入式多媒體產品上。
本論文提出一個高效能且低成本的演算法，藉由檢測四個方向相關性，不同顏色之間的相關性等概念來對彩色濾波陣列做插補，此方法只需使用到4列line buffer，與使用同樣儲存空間的硬體實現的方法相比，能得到更佳的影像品質與更低的硬體成本，並且與較高儲存空間的軟體實現的方法相比也可達到相近的影像水準。此外，為了達到有效率的硬體實現，我們利用管線化的技巧提升硬體可運行之時脈，完成一顆可即時處理的晶片，並且利用演算法的特性，共用許多硬體計算元件，降低硬體資源的使用。此硬體架構是使用 TSMC 90nm 標準元件庫進行合成，合成出的電路可達每秒250百萬的處理速度，是目前所提出相關演算法的硬體架構中最快的處理速度。相比於近年的相關研究，我們提出的方法是目前所有相關演算法的硬體架構中，達到最快的處理速度，並以低硬體成本、儲存空間達到有競爭力影像品質。

Recently, with the development of technology, digital cameras have made great progress in techniques, especially in digital image processing techniques. In the video-capture process, demosaicking, also known as the color filter array interpolation method, is one of the most important methods. There were some related algorithms being proposed in the past few years, including self-defined algorithms and algorithms based on machine learning. The computations of algorithms based on machine learning have long run-time and are too complex to be applied to real-time products. However, there are two types of self-defined algorithms. One obtains better image quality through using higher storage space. Another is less complex and low cost, which as a result, is more suitable for a real-time embedded multimedia product.
In this thesis, we propose a high-performance demosaicking algorithm, which is based on four directional correlations and the color differences plane. Our demosaicking algorithm only needs four line buffers for storage space. Compared with the hardware implementation of those methods, which use the same storage space, the cost of our design is lower, and it can obtain better image quality. Also, compared with the high-quality software implementations, our image quality is as good as theirs. Besides, to develop an efficient design, the pipeline technique is applied to improve the hardware timing of the proposed scheme. The VLSI architecture is synthesized with TSMC 90-nm process standard cell library. The processing rate of the synthesized circuits can yield approximately 250 M samples per second, which is the fastest processing rate compared with those of related hardware implementations. This result reveals that the proposed method has the advantage of low-cost and high quality in the field of demosaicking.

[1] B. E. Bayer, "Color imaging array," U.S. Patent 3 971 065, Jul. 1976.
[2] R. Ramanath, W.E. Snyder, G.L. Bilbro, and W.A. Sander III, "Demosaicking methods for Bayer color arrays," J. Electron. Imaging, vol. 11, no. 3, pp. 306–315, Jul. 2002.
[3] Soo-Chang Pei and Io-Kuong Tam, "Effective color interpolation in CCD color filter arrays using signal correlation," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 6, pp. 503-513, June 2003.
[4] Y.-S. Huang and S.-Y. Cheng, “An effective color-difference-based demosaicking method,” J. Marine Sci. Technol., vol. 21, no. 6, pp. 623–630, 2013.
[5] I. Pekkucuksen and Y. Altunbasak, “Edge strength filter based color filter array interpolation,” IEEE Trans. Image Process, vol. 21, no. 1, pp. 393–397, Jan. 2012.
[6] X. Chen, G. Jeon, and J. Jeong, “Voting-based directional interpolation method and its application to still color image demosaicking,” IEEE Trans. Circuits Syst. Video Technol., vol. 24, no. 2, pp. 255–262, Feb. 2014.
[7] C. Lien, F. Yang and P. Chen, "An Efficient Edge-Based Technique for Color Filter Array Demosaicking," in IEEE Sensors Journal, vol. 17, no. 13, pp. 4067-4074, 1 July1, 2017.
[8] S. L. Chen and E. D. Ma, “VLSI implementation of an adaptive edge-enhanced color interpolation processor for real-time video applications,” IEEE Trans. on Circuits and Systems for Video Technology, vol. 24, no. 11, pp. 1982-1991, Nov. 2014
[9] S. L. Chen and H. R. Chang, " Fully pipelined low-cost and high-quality color demosaicking VLSI design for real-time video applications," IEEE Trans. Circuits Syst. II, vol. 62, no. 6, pp. 588-592, Jun. 2015.
[10] C. Lien, F. Yang, P. Chen and Y. Fang, "Efficient VLSI Architecture for Edge-Oriented Demosaicking," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 28, no. 8, pp. 2038-2047, Aug. 2018.
[11] T. -L. Lin, C. -W. Chang, J. -S. Tu, X. -F. Yue and J. -R. Yang, "Edge-Based Demosaicking Method Using Uncorrelatedness With Sensors for CFA," in IEEE Sensors Journal, vol. 19, no. 19, pp. 8904-8912, 1 Oct.1, 2019.
[12] Y. Niu, J. Ouyang, W. Zuo and F. Wang, "Low Cost Edge Sensing for High Quality Demosaicking," in IEEE Transactions on Image Processing, vol. 28, no. 5, pp. 2415-2427, May 2019.
[13] P. Y. Chen, C.-Y. Lien, and C.-P. Lu, “VLSI implementation of an edge-oriented image scaling processor,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 17, no. 9, pp. 1275–1284, Sep. 2009.
[14] ADAMS JR, James E. Design of practical color filter array interpolation algorithms for digital cameras. In: Real-Time Imaging II. International Society for Optics and Photonics, 1997. p. 117-125.
[15] L. Zhang, “18 McMaster Color images,” http://www.comp.polyu.edu.hk/~cslzhang/CDM_Dataset.htm
[16] “KodakPhotoCD,” http://r0k.us/graphics/kodak/
[17] Modern Resolution Kodak Image Dataset. Accessed: Jan. 11, 2018. [Online]. Available: http://www.math.purdue.edu/~lucier/PHOTO_CD/ BMP_IMAGES/
[18] E. Agustsson and R. Timofte, "NTIRE 2017 Challenge on Single Image Super-Resolution: Dataset and Study," 2017 IEEE Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), 2017, pp. 1122-1131.