本論文研製47-GHz低功率消耗之電流再利用型壓控振盪器、94-GHz考畢子壓控振盪器，振盪器採用TSMC 90-nm CMOS製程製作，47-GHz電流再利用型壓控振盪器採用電流再利用技術，以減少功耗，使用自發轉導匹配技術動態地平衡交互耦合電晶體對的轉導值，改善輸出振幅不平衡的現象。並且在交互耦合電晶體對加入旁路電容減緩源極退化的效應，進一步降低功耗。94-GHz考畢子壓控振盪器設計分為兩個階段，第一階段設計47-GHz差動考畢子壓控振盪器，採用汲極至源極回授，偏壓電流透過交互耦合電晶體對實現，可同時提供正回授以提升整體的迴路增益。透過基極偏壓技巧減少電晶體的臨界電壓，振盪器訊號經由回授電容給予基極偏壓，提升電晶體的轉導值，亦加快電流切換電晶體的切換速度，達到較佳的相位雜訊，有效提升主動電路所提供的負轉導，克服考畢子振盪器嚴苛的起振條件。加入PMOS交互耦合電晶體對可再提升整體負轉導以及輸出振幅，亦同時給予緩衝器偏壓。第二階段設計94-GHz考畢子壓控振盪器，倍頻器採用轉導提升雙推式架構，倍頻器輸出電流的二倍頻項大小由訊號振幅決定，不會被輸出端的高阻抗給抑制，能產生大輸出電壓擺幅去驅動下一級電路。由於振盪器輸出端為倍頻器的共模點，後級電路不會造成差動考畢子振盪器的負載效應，予以加入放大器提升振盪器輸出功率。此倍頻器的電流將再利用於考畢子振盪器，使用電流再利用技巧降低考畢子振盪器的功耗。晶片電路設計皆以Agilent ADS及全波電磁模擬軟體進行模擬，量測皆採用on-wafer方式進行。

This thesis presents a 47-GHz low power current-reuse VCO and a 94-GHz Colpitts VCO which are implemented in a 90-nm CMOS process. The low power design can be achieved by current-reuse technique in the 47-GHz VCO. To improve the imbalance amplitude due to the asymmetric structure, the transconductances of the cross-coupled pair are dynamically equal to each other with spontaneous transconductance match (STM) technique. In addition, the source degeneration effect can be alleviated by adding bypassed capacitor. In the first part, the 94-GHz Colpitts VCO design is divided into two parts. A 47-GHz differential drain-to-source feedback Colpitts VCO core biased by current switching transistors provides positive feedback to increase loop gain in the first part. The threshold voltage of transistors could be reduced by forward body biasing technique. Due to this technique provided by capacitive divider, the transconductance of transistors can be boosted and the phase noise of oscillator can also be improved by quick transition of current switching transistor between on and off states. The stringent start-up condition would be overcame by effectively boosting negative conductance of active circuit. Furthermore, the PMOS cross-coupled pair which biases the buffer stages increases the overall of negative conductance and output amplitudes. The second part presents a 94-GHz Colpitts VCO with the gm-boosted doubler. The second-harmonic current amplitude determined by input signal amplitude would not be suppressed by high impedance of the output and could generate a large swing to drive the next circuit. Since the doubler output is the common-mode node of oscillator output, the additional amplifiers increase the output power without loading oscillator. The current of the doubler is reused by the Colpitts VCO topology. This current-reuse technique lowers power consumption of oscillator. These chips are measured using on-wafer probing.

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