| 研究生: |
歐國和 Ou, Kuo-Ho |
|---|---|
| 論文名稱: |
高容量積層陶瓷電容器之研究 Analysis and Design of High-Capacitance Multilayer Ceramic Capacitors |
| 指導教授: |
蔡智明
Tsai, Chih-Ming |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系碩士在職專班 Department of Electrical Engineering (on the job class) |
| 論文出版年: | 2007 |
| 畢業學年度: | 95 |
| 語文別: | 中文 |
| 論文頁數: | 84 |
| 中文關鍵詞: | 串聯輸入阻抗 、鉭質電容器 、積層陶瓷電容器 、寬頻電容器 、複合陶瓷體 |
| 外文關鍵詞: | ESL, ESR, CMC, MLCC, Composite MLCCs, Broad Band |
| 相關次數: | 點閱:119 下載:7 |
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過去的六~七年間,由於積層陶瓷電容器在高介電常數粉體的開發及陶瓷薄膜堆疊技術的進步,使得生產出來的電容器其容值也越來越高,已逐漸取代電腦及消費性電子等產品上,一般容值(1uF ~ 100uF)電容器的應用,如電解電容和鉭質電容。
本論文有三個主題。第一是積層陶瓷電容器及鉭質電容器應用轉換圖表的建立,大多數工程師對於不同介電材料電容器轉換會希望採取規格上一對一的取代模式,而常有因規格上找不到對應品或因為成本的考量而無法來快速進行替換。為了幫助工程師能很快的找出兩類電容器的特性對照關係,本論文設計了一個可納入頻率、溫度及電壓參數的測試平台,模擬電容器於電子電路應用時受工作頻率、工作電壓及環境溫度影響時其實際的特性表現,並建立此兩類電容器於反交連與濾波等應用上轉換的對應表格及曲線。也實證了對於不同介電材料電容器採一對一規格上的取代模式是不合適的。
第二個研究主題為高介電材質的積層陶瓷電容器之電容量溫度特性改善,隨著積層陶瓷電容器往高電容量發展,其已進入了原固態電容器的應用領域,此電容器需要能提供一穩定的有效電容量,來輔助電源模組提供線路負載瞬間的電源需求。加上低的ESR高分子固態電容的開發推出,將迫使高容量積層陶瓷電容器對高溫的工作環境效應需立即的來克服改善。本論文於材料粉體及其堆疊結構設計的研究,將一低溫及一高溫居理溫度點的兩材料燒結合成一複合陶瓷體電容器,並開發出Y5R的規格,其有Y5V的溫度應用範圍,同X7R之R規範中溫度對電容量的變化。
第三個研究主題為寬頻電容器的設計開發,利用積層陶瓷電容器其積層的特性,將寬頻電容器內以多個子電容器採並聯的結構設計,可再大幅的縮小積層陶瓷電容器內的寄生ESL值,而增廣其工作頻寬及應用領域。並也能應用於一般電源線路上反交連或濾波電容器組(例如: 4.7uF + 10nF, 10uF + 100nF等)的模組化。
In the past six to seven years period, the multilayer ceramic capacitors (MLCCs) were developed rapidly in high dielectric constant powder and the stacking technology. The high capacity value of the capacitors can now be achieved and in mass production. The application areas for MLCCs have gradually replaced the market of the traditional middle or low-capacity (1uF ~ 100uF) by electrolytic and tantalum capacitors.
There are three topics in this thesis. The first one is to establish the transformation table between tantalum capacitors and MLCCs. Engineers expect to interchange of capacitors of different dielectric materials by one-to-one substitution patterns. But this approach often has problems like it may not be able to find the corresponding product to fit the specifications or it may not be replaced due to the cost. In order to easily and quickly find the characteristics relationship of the two type of capacitors, in this thesis we design a rapid testing platform which can bring into the parameters of the frequency, temperature and voltage, etc. It simulates the characteristics of these two type of capacitors in different frequency, voltage, and temperature. Furthermore, the transformation tables and the corresponding curves in decoupling and smoothing application are established. Obviously, it is not appropriate to utilize one-to-one substitution patterns of the capacitor’s specification for different dielectric materials.
The second topic of this thesis is to improve the temperature characteristics of the capacity for the multilayer ceramic capacitor with high dielectric material. As the development of the multilayer ceramic capacitor is toward to a higher capacity, it has extended to the solid capacitors application areas. For this application, the capacitor needs to provide a stable and effective capacity to power supply modules which can apply the power requirements for the load of the circuit in a wink. In addition, the development of solid polymer Low ESR capacitor will accelerate the improvement for the high-temperature characteristics of the high-capacity multilayer ceramic capacitors. For the improvement of the high-temperature characteristics, we study the powder characteristics and stacking structure of the multilayer ceramic capacitor. We sinter a low and high Curie point ceramic materials to synthesize a composite multilayer ceramic capacitor, and develop the product with Y5R specification. Its temperature application range is the same as Y5V, and its capacitance dependence on temperature is similar to X7R.
The third topic of this thesis is the design and development of the broadband multilayer ceramic capacitor. By the multilayer structure of the ceramic capacitor, a decoupling capacitor module on power supplier (for example: 4.7uF+10nF, 10uF+100nF, etc.) can be sintered in a multilayer ceramic capacitor by parallel. This further reduce the capacitor’s parasitic ESR and ESL, increase the application bandwidth, and also turn it into a module.
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