本論文利用N型半導體材料十三烷基駢苯衍生物(N,N’-ditridecy1-3,4,9,10-perylenetetracarboxylic diimide，PTCDI-C13H27)與P型材料聚(3-己基噻吩)( poly(3-hexylthiophène)，P3HT)之異質結構製作N型有機記憶體元件，通過改變P3HT濃度，觀察其表面微結構以及探討元件之電特性與記憶視窗之變化。本實驗使用聚酰亞胺(Polyimide，PI)作為電荷捕捉層，利用旋轉塗佈的方式依次製作PI與不同濃度之P3HT薄膜，最後利用物理氣相沉積儀成長厚度為60 nm之PTCDI-C13H27與80 nm金屬銀電極。
經由原子力顯微鏡(Atomic Force Microscope，AFM)觀察薄膜的表面微結構，我們發現當P3HT濃度為0.01 WT%與0.05 WT%時，其表面無法形成連續的薄膜，P3HT分子聚集形成山峰形狀之突起，表面粗糙度較大；當濃度為0.1 WT%時，P3HT呈現小顆粒之晶粒結構，且薄膜表面存在少量的孔洞，推測P3HT向四周擴散形成存在少量孔洞之連續薄膜，同時其表面粗糙度降低；當P3HT濃度增加至0.2 WT%時，薄膜表面粒徑明顯增大，表面孔洞消失，其表面粗糙度持續下降，推斷此時P3HT表面已形成平坦的連續薄膜。由掃描電位顯微鏡(Scanning Kelvin Probe Microscope，SKPM)分析結果表明，當P3HT濃度為0.01 WT%與0.05 WT%時，其薄膜表面存在電位分佈不均的狀況，主要是由於在低濃度時P3HT未能形成連續薄膜所導致，同時經過SKPM平均電位的換算可得出不同濃度P3HT的表面功函數，經由分析可以發現其隨P3HT濃度提升而逐漸增加。最後通過導電式原子力顯微鏡(Conductive Atomic Force Microscope，C-AFM)量測P3HT薄膜表面的水平導電性顯示，在低濃度時未能形成P型導通通道，進一步證明上述論點。
在電特性分析結果顯示，元件的輸出電流隨P3HT濃度增大而減少，且當PH3T濃度為0.2 WT%時，輸出電流急劇下降，推測主要原因為N型載子通道下層的P3HT提供過多的P型載子，使得上層PTCDI-C13H27提供的N型載子在水平傳導受到影響。在元件記憶特性方面顯示，記憶視窗隨著P3HT濃度增加而增大，當P3HT濃度在0.1 WT%至0.2 WT%時記憶視窗趨於飽和達到40 V以上，此時下層P3HT薄膜提供電洞注入且抑制了電子的注入，使得元件之寫入視窗明顯減小、清除視窗明顯增大。記憶保持方面，由於N型電晶體量測操作時所施加之電場容易吸引電洞由電荷捕捉層釋放返回半導體層，導致元件記憶持久力較差。最後經過耐久力測試，元件之記憶效應耐久度測試表現優異。

The impact of P3HT with different concentrations on electrical properties and memory windows of non-volatile organic memories (NVOMs) with the p-n heterojunction of P3HT/PTCDI-C13H27 is investigated in this thesis. PTCDI-C13H27 is deposited on P3HT films of different concentrations to form a heterojunction. After observation by an atomic force microscopy (AFM), it is found that a discontinuous film whose NVOM has a N-type unipolar transmission property is formed when the concentration of P3HT is 0.01 WT% and 0.05 WT%. While a continuous film whose NVOM has an ambipolar transport property is formed when the concentration of P3HT is formed when the concentration of P3HT is 0.20 WT%. This indicates that a P-type transmission channel that can be conducted horizontally is formed in the continuous film. And the memory window of devices is significantly improved with the P3HT concentration increases because sufficient hole carriers are provided by the P3HT to improve the erasing ability of devices. Unfortunately, the writing window of devices is reduced because the injection of electron will be suppressed by the lower-layer P3HT during writing process. In summary, an efficient method of regulating the memory window of devices by forming the p-n heterostructure on polyimide is showed in the study.

[1] H.-J. Yen, C. Shan, L. Wang, P. Xu, M. Zhou, H.-L. Wang, “Development of Conjugated Polymers for Memory Device Applications” Polymers. 9(1), 25, 2017.
[2] Q.-D. Linga, D.-J. Liawb, C. Zhuc, D. S.-H. Chanc, E.-T. Kanga, K.-G. Neoha, “Polymer electronic memories: Materials, devices and mechanisms”, Prog. Polym. Sci., 3, 917, 2008.
[3] D. Kahng, S. M. Sze, “A floating gate and its application to memory devices”, Bell System Technical Journal., 46, 1288, 1967.
[4] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, K. Chan, “A silicon nanocrystals based memory”, Appl. Phys. Lett., 68, 1377, 1996.
[5] Z. Liu, C. Lee, V. Narayanan, G. Pei, E. C. Kan, “Metal nanocrystal memories”, IEEE Tras. On Electron Devices, 49, 1606, 2002.
[6] M. L. Ostraat, J. W. De Blauwe, M. L. Green, L. D. Bell, M. L. Brongersma, J. Casperson, R. C. Flagan, H. A. Atwater, “Synthesis and characterization of aerosol silicon nanocrystal nonvolatile floating-gate memory devices”. Appl. Phys. Lett., 79, 433, 2001.
[7] B. Eitan, P. pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, “Nrom: A novel localized trapping, 2-bit non-volatile memory cell”, IEEE Electron Device Lett., 79, 433, 2000.
[8] J. D. Blauwe, “Nanocrystal Nonvolatile Memory Devices”, IEEE Trans. On Nanotechnology, 1, 72, 2002.
[9] R. Ohba, N. Sugiyama, K. Uchida, J. Koga, A. Toriumi, “Nonvolatile Si quantum memory with self-aligned doubly-stacked dots”, IEEE trans. Electron Devices, 52, 507, 2005.
[10] S. Choi, S. S. Kim, M. Chang, H. Hwang, S. Jeon, C. Kim, “Highly thermally stable TiN nanocrystals as charge trapping sites for non-volatile memory device applications”, Appl. Phys. Lett., 86, 123110, 2005.
[11] W. L. Leong, N. Mathews, B. Tan, S. Vaidyanathan, F. Dotz, S. Mhaisalkar, “Towards printable organic thin film transistor based flash memory devices”, J. Mater. Chem., 21, 5203, 2011.
[12] A. Doron, E. Katz, I. Willner, “Organization of Au colloids as monolayer films onto ITO glass surfaces: application of the metal colloid films as base interfaces to construct redox-active monolayers”, Langmuir, 11, 1313, 1995.
[13] W. L. Leong, N. Mathews, B. Tan, S. Vaidyanathan, F. Dotz, S. Mhaisalkar, “All solution processed non0volatile top-gate polymer field effect transistors”, J. Mater. Chem., 21, 8971, 2011.
[14] H. Wegener, A. Lincoln, H. Pao, M. O’Connell, R. Oleksiak, H. Lawrence, “The Variable-Threshold Transistors, a New Electrically-alterable, Nondestructive READ-only Storage Device”, IEEE, IEDM Tecb. Dig., p.70, 1967.
[15] K. J. Baeg, Y. Y. Noh, J. Ghim, S. J. Kang, H. Lee, D. Y. Kim, “Organic Non-Volatile Memory Based on Pentacene Field-Effect Transistors Using a Polymeric Gate Electret”, Adv. Mater., 18, 3179, 2006.
[16] M. Debucquoya, M. Rockelé, J. Genoe, G. H. Gelinck, P. Heremans, “Charge trapping in organic transistor memories: On the role of electrons and holes”, Org. Electronics, 10, 1252, 2009.
[17] L. L. Chua, J. Zaumseil, J. F. Chang, Eric C.-W. Ou, Peter K.-H. Ho, H. Sirringhus, R. H. Friend, “General observation of n-type field-effect behavior in organic semiconductors”, Nature, 424, 194, 2005.
[18] B. Mukherjeea, M. Mukherjeea, “Programmable memory in organic field-effect transistor based on lead phthalocyanine”, Org. Electronics, 10, 1282, 2009.
[19] T. B. Singh, N. Marjanović, G. J. Matt, N. S. Sariciftci, R. Schwödiauer, S. Bauer, “Nonvolatile organic field-effect transistor memory element with a polymeric gate electret”, Appl. Phys. Lett., 85, 5409, 2004.
[20] P. Cosseddu, S. Lai, G. Casula, L. Raffo, A. Bonfiglio, “High performance, foldable, organic memories based on ultra-low voltage, thin film transistors”, Org. Electronics, 15, 3595, 2014.
[21] L. P. Ma, J. Liu, Y. Yang, “Organic electrical bistable devices and rewritable memory cells”, Appl. Phys. Lett., 80, 2997, 2002.
[22] J. Oyang, C. W. Chu, C. R. Szmanda, L. Ma, Y. Yang, “Programmable polymer thin film and non-volatile memory device”, Nat. Mater., 3, 918, 2004.
[23] K. L. Mittal, “Polyimides: Synthesis, Characterization, and Applications”, Springer Science & Business Media, 1, 533, 2013.
[24] J. H. Kim, B.-U. Hwang, D.- I. Kim, J. S. Kim, Y. G. Seol, T. W. Kim, N.-E. Lee, “Nanocomposites of polyimide and mixed oxide nanoparticles for high performance nanohybrid gate dielectrics in flexible thin film transistors”, Electronic Mater. Lett., 3, 214, 2017.
[25] S. Tatemichi, M. Ichikawa, T. Koyama, Y. Taniguchi, “High mobility n-type thin-film transistors based on N, N-ditridecyl perylene diimide with thermal treatments”, Appl. Phys. Lett., 89, 112108, 2006.
[26] L. Bürgi, T. J. Richards, R. H. Friend, H. Sirringhaus, “Close look at charge carrier injection in polymer field effect transistors”, J. Appl. Phys., 94, 6129, 2003.
[27] F. C. Wu, Y. C. Huang, H. L. Cheng, W. Y. Chou, F. C. Tang, “Importance of disordered polymer segments to microstructure-dependent photovoltaic properties of polymer: fullerene bulk heterojunction solar cells”, J. Phys. Chem. C, 115, 15057, 2011.
[28] P. G. Nicholson, V. Ruiz, J. V. Macpherson, P. R. Unwin, “Effect of composition on the conductivity and morphology of poly(3-hexylthiophene)/gold nanoparticle composite Langmuir-Schaeffer film”, phys. Chem. Chem. Phys., 8, 5096, 2006.
[29] E. H. Nicollian and A. Goetzberger, “Si-SiO2 Interface-Electrical Properties as Determined by the Metal-Insulator-Silicon Conductance Technique”, Bell Syst. Tech. J., 46. 1055-1133, July/Aug. 1967.
[30] M. J. Uren, S. Collins, M. J. Kirton, “Observation of ‘‘slow’’states in conductance measurements on silicon metal‐oxide‐semiconductor capacitors”, Appl. Phy. Lett., 54(15), 1448-1450, 1989.
[31] Y. Y. Shi, Q. Zhou, A. B. Zhang, L. Y. Zhu, Y. Shi, W. J. Chen, Z. J. Li, B. Zhang, “Investigation of Bulk Traps by Conductance Method in the Deep Depletion Region of the Al2O3/GaN MOS Device”, Nanoscale Research Letters, 12.1:342, 2017.