本論文分為兩部分。第一部分提出透過汲極至閘極的變壓器回授提高閘極電壓擺幅，並利用八字形電感的磁通干擾抵銷特性，在變壓器內加入第三圈電感。此設計減少了整合電感器的面積需求，且無需額外的可變電容即可實現二次與三次諧波的寬頻共模/差模共振，提升LC槽的品質因數並降低VCO的相位雜訊。第二部分提出基於整合該VCO的接收機架構。於此接收機架構中的低雜訊放大器（LNA）採用兩級設計，第一級使用三重耦合巴倫以生成差動訊號並實現Gm增強和雜訊相消，第二級則與VCO共享電流以降低功耗。混頻器採用次諧波架構，RF級電晶體運作在亞閾值區以降低功耗，同時提高負載電阻和轉換增益；LO級電晶體則使用push-push架構，提取兩倍LO頻率訊號。為提升線性度，LO級和RF級源級加入電感，並利用LO級電感抑制寄生電容和降低RF訊號洩露。模擬結果顯示，整體功耗為10.6 mW，增益為35.6 dB，IIP3為-2.5 dBm，雜訊指數為8.7 dB，且VCO在12 GHz頻率下相位雜訊達到 -113 dBc/Hz @ 1 MHz的表現。

This paper is divided into two parts. The first part proposes a design that enhances the gate voltage swing through transformer feedback from the drain to the gate and incorporates a third inductor coil into the transformer using the flux cancellation characteristics of the eight-shaped inductor. This design reduces the area required for inductors and achieves wideband common-mode (CM) and differential-mode (DM) resonance at the second and third harmonics without the need for additional varactors. This improves the quality factor of the LC tank and reduces the phase noise of the VCO.
The second part presents a receiver architecture based on the proposed VCO. The low-noise amplifier (LNA) adopts a two-stage design. The first stage employs a triple-coupled balun to generate differential signals while achieving transconductance (Gm) enhancement and noise cancellation. The second stage shares current with the VCO to reduce power consumption. The mixer adopts a sub-harmonic architecture, which improves isolation to prevent mutual interference between the LO signal and the RF signal. The RF-stage transistors operate in the sub-threshold region to reduce power consumption while increasing the load resistance and conversion gain. The LO-stage transistors adopt a push-push architecture to extract signals at twice the LO frequency. To improve linearity, inductors are added to the source of the LO and RF stages. The LO-stage inductor suppresses parasitic capacitance and reduces RF signal leakage.
Simulation results show that the overall power consumption is 10.6 mW, the gain is 35.6 dB, the IIP3 is −2.5 dBm, and the noise figure is 8.7 dB. The VCO achieves a phase noise of −113 dBc/Hz at 1 MHz offset at a 12 GHz frequency.

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