金屬矽化物早已成為半導體元件製程中導線與接觸之材料。在不同的矽化物中，因鈷矽化物對窄線寬效應、低電阻率與良好的熱穩定度有免疫力，所以鈷矽化物是近來最被廣泛使用在自行對準矽化物技術的材。然而，隨著元件尺寸不斷地縮小至深次微米，物理結構產生的壓力已經明顯地影響鈷矽化物形成。所以，本論文把針對緊鄰不同物理結構的鈷矽化物形成，列為主要的研究主題。
在形成鈷矽化物期間，由於固態反應與體積變化作用，使鈷原子成為主要的擴散物質。根據實驗研究結果，吾人發現溝渠與上緣溝渠角所產生的擠壓應力(The Compressive Stress)，會增加鈷矽化物之形成及降低片電阻；反之，氮化矽間隙壁與活化區摻雜物所產生的拉伸應力(The Tensile Stress)，則會減緩鈷矽化物之形成及升高片電阻。而升高片電阻最主要是來自，座落在溝渠凹槽上的氮化矽間隙壁產生大的拉伸應力，所引起不均的鈷矽化物形成。
除此之外，根據所有樣品電性的比較，較大的擠壓應力會產生較大的鈷矽化物導線電阻溫度係數(The Temperature Coefficient of Resistance)；較大的拉伸應力會產生較小的電阻溫度係數。根據不同溝渠凹槽的內裏氧化層厚度對接合漏電的影響非常輕微來看，上緣溝渠角的壓力對鈷矽化物形成的影響，是較小於其它物理結構的影響。又，擠壓應力所產生的接合漏電大於拉伸應力。

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本論文針對假性金屬線上電荷堆積誘發鎢插拴腐蝕，作一系列深入之研究並提出改善的方法。鎢插拴腐蝕可能發生於剝離高分子溶液中，甚至被這些溶液經由電化學作用溶解掉。吾人經由SEM觀察化學機械研磨後的樣品發現鎢插拴並沒有被掀舉，而證實鎢插拴腐蝕是發生於前述剝離高分子製程中。
此外，吾人發現利用過度蝕刻(Over Etch)或者灰化光阻(Photoresist Ash)中的被電漿游離氣體分子，並無法釋放在假性金屬線上的堆積電荷。唯有在剝離高分子製程前，另加水蒸氣的低溫烘烤，才能有效消除鎢插拴腐蝕現象。

Metal silicides have been developed as interconnect and contact materials for semiconductor device fabrication. Among different silicides, CoSi2 is the most widely used material for salicide technology recently, since it has immunity to narrow line width effect, lower resistivity and good thermal stability. However, with the continued scaling down of device features, the stress induced by physical structures has noticeable effect on the formation of CoSi2 in deep sub-micron ULSI technology. In this thesis, the formation of CoSi2 affected by the neighboring different physical structures induced stress has been studied in detail.
During the growth of CoSi2, it has been reported that the main diffusing specie is Co atom for the solid phase reaction and volumetric change. We found the diffusion of Co atoms is also affected by the stress, i.e. the compressive stress caused by trench and top trench corner enhances the CoSi2 formation and gains a lower sheet resistance. On the contrary, the tensile stress caused by silicon nitride spacer or impurity dopant retards the CoSi2 formation and a higher sheet resistance.Additionally, the major contribution to the higher sheet resistance is the large tensile stress caused by the silicon nitride spacer on narrow trench. The tensile stress will cause the poor formation of CoSi2.
Furthermore, there is a trend that the TCR (The Temperature Coefficient of Resistance) of the CoSi2 wire is higher with higher compressive stress but is lower for higher tensile stress. Next, the difference in junction leakage is very small with different thickness of lining oxide. Therefore, the stress effect of top trench corner for the formation of CoSi2 is smaller than other physical structures. Finally, the junction leakage of N+/Pwell or P+/Nwell caused by the compressive stress is more significant than that by the tensile one.

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In this thesis, the tungsten plug corrosion induced by the charges on dummy metal surfaces after metal etch process was studied in detail. The tungsten plug corrosion can be induced during polymer strip in solvent and even be almost dissolved by electrochemical reaction. These phenomena were evidenced by in-line inspections with wafer level SEM (Scanning Electron Microscope) scanning at the step of post tungsten CMP (Chemical Mechanical Polish) and found no tungsten plug lifting.
Next, at the discharge step of post over etch or post photoresist ash, the plasmolyzed gases not only can’t release charges on dummy metal surfaces, but also even increase via failure rates. However, an extra added baking in H2O vapor ambient prior to soak in polymer strip solvent is a good approach to improve tungsten plug corrosion.

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