中文摘要
記憶體構裝是最先採用晶片級封裝型式的產品，具有尺寸小，用料少，電性優異，節省電路板所佔空間及達到降低成本等優點。另外，應用微型球柵陣列構裝屬於先進晶片尺寸構裝，其佈線較短，可得較佳之電性性能，而傳輸速度越快，其內部產生熱量也相對提高，熱一直是造成元件失效的主要原因之一，使得散熱能力，成為目前業界急欲解決的主要問題之一。本研究係分析晶片尺寸級之球柵陣列構裝（CSP-BGA）之熱場問題。利用ANSYS 軟體建立3維FEM 固體模型，模擬構裝體在輸入1W負載之電壓時所產生的熱場。觀察晶片尺寸級之球柵陣列構裝在自然對流及強迫對流下之熱阻值，並與實驗量測作比較，以驗証模擬之正確性。最後，進行單一因子分析以觀察不同材料性質及尺寸大小等因子對構裝體之熱阻的影響，並配合田口方法(Taguchi Method)找出影響較大的因子，進而決定構裝體最佳化設計。經由實驗結果及變異分析我們得知影響構裝熱阻值主要為印刷電路板層數、表面對流係數及錫球數目，未來可作為業界改善構裝散熱的依據。

ABSTRACT
The Chip-Scale-Package Assembly package was firstly applied to the manufacture of the memory product which possesses the advantages of small size, less material, better electrical characterization, less space occupied by the print circuit board as well as the production costs down. Furthermore, as one of the advanced chip scale packages, the CSP-BGA is also recognized to possess the advantages of short signal lines, better electrical characterization and higher transmission speed. Thus oppositely it follows the higher interior temperature which always leads to the damage and inefficiency of IC package. Therefore the capability of heat dissipation becomes a critical issue. This study analyzes the thermal field of the Chip Scale Package BGA. First of all, a three dimension Finite Element Model is built by applying the ANSYS software, and one watt of electric power is loaded to simulate the thermal distribution of the package. Moreover the thermal resistances of CSP-BGA under the natural convection and the force convection respectively are discussed and compared with the experimental results so as to verify the accuracy of the simulation. Finally the Taguchi Method is applied to conduct the one-factor analysis in which the effects of different geometric shapes and material properties on the thermal resistance of the CSP BGA package are observed and those factors with more significant effects are obtained. As a result, an optimum design of the package can be determined.

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