| 研究生: |
張義貴 Chang, Yi-Kuei |
|---|---|
| 論文名稱: |
一維奈米材料與奈米線電晶體之研究 The study of one-dimensional nanomaterials and nanowire field-effect transistor |
| 指導教授: |
洪昭南
Hong, Chau-Nan |
| 學位類別: |
博士 Doctor |
| 系所名稱: |
工學院 - 化學工程學系 Department of Chemical Engineering |
| 論文出版年: | 2009 |
| 畢業學年度: | 97 |
| 語文別: | 中文 |
| 論文頁數: | 223 |
| 中文關鍵詞: | 氮化銦 、氧化鋅 、電晶體 、奈米線 |
| 外文關鍵詞: | zinc oxide, transistor, nanowire, Indium nitride |
| 相關次數: | 點閱:55 下載:2 |
| 分享至: |
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本論文主要分為兩大部分:第一部份為一維奈米材料的合成,包括氧化鋅奈米線及氮化銦奈米線。在氧化鋅奈米線的合成方面,我們利用水熱法以Zinc acetate及Hexamethylenetetramine (HMTA)為前趨物在不同成核層上成長,包括以醋酸鋅為前趨物旋轉塗佈低溫燒結而成的薄膜、濺鍍氧化鋅薄膜、蒸鍍銀薄膜及銀奈米粒子。經XRD與TEM鑑定氧化鋅奈米線為完美單晶,且沿著 方向成長。而在氮化銦奈米線的合成方面,我們則是使用自行開發的電漿輔助高溫爐系統來成長。由XRD、TEM、Raman及ESCA分析得知所成長為完美的單晶氮化銦奈米線。當基板溫度設定從550 oC變為580 oC時,氮化銦的結構由奈米線轉變為上尖下寬的奈米帶。
第二部份則為奈米線電晶體的製備。首先是以PDMS為轉移基板利用滾壓法製作具單一方向排列的奈米線陣列來製備奈米線電晶體。電晶體特性為subthreshold slope~360 mV/dec,electron mobility~91 cm2/Vs,threshold voltage~0.25V。另外為了解決利用介電泳排列奈米線後,奈米線與電極接觸電阻過高的問題。我們利用熱壓法及電極自我對準技術來解決。熱壓法是利用鍍有類鑽碳膜的矽基板為壓版,在180oC高壓下將奈米線壓進電極中。由電性曲線圖可知,兩端電阻在經過熱壓後已大幅降低。而自我對準技術則是利用從基板背面曝光的方式,以第一層金屬電極為光罩,將第二層電極準確地製作在第一層電極之上。在鍍上電極後可大幅地將低接觸電阻,也解決了一般以光微影定義第二層圖案需對準的問題。
There are two main subjects have been studied in this essay. The first part is the synthesis of one-dimensional nanomaterials including Zinc Oxide (ZnO) and Indium Nitride (InN) nanowires. ZnO nanowires were synthesized by hydrothermal using Zinc acetate and Hexamethylenetetramine as precursor on different nucleation layers like spin-coated Zinc acetate layer, sputtered ZnO film, evaporated Ag film and Ag nanoparticles. The ZnO nanowire are single-crystalline and grow along [0001] by XRD and TEM analysis. Besides, high-quality Indium nitride (InN) nanowires were synthesized in plasma-assisted furnace. X -ray diffraction, transmission electron microscopy and Raman spectra further showed that the as-synthesized InN nanowires were perfect single crystallites of wurtzite structure with the growth direction along [110]. As the substrate temperature change from 550 to 580oC, Indium nitride nanowires transform to tapered nenobelts.
The second part is about the fabrication of nanowire field-effect transistor (NW-FET). The well-ordered nanowire arrays were obtained by roll-transfer using PDMS as transfer sheet. ZnO NW-FETs fabricated by this method exhibit high performances with the threshold voltage around 0.25 V, the current on/off ratio as high as 105, the subthreshold slope of 360 mV/dec, and the field-effect mobility around 90 cm2/Vs. In order to overcome the problem about poor contacts between nanowires and electrodes after dielectricphoresis (DEP), hot-pressing and self-align were applied. The hot-pressing of nanowires on the electrodes was employed to sink into electrodes and ensure good contacts between the nanowires and the electrodes. And the self-align technique was employed to deposit second metal layer on nanwire-first metal layer. The second metal layer deposition would overcome the problem of the poor contact between nanowire and electrode after DEP.
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