隨著21世紀進入知識經濟的時代，電子化產品的應用領域日趨廣泛，對半導體元件需求也呈現大幅成長，使得IC（Integrated circuit）封裝的需求大幅增加。隨著產品生命週期的縮短與顧客需求的多樣化，IC封裝業者必須持續不斷地提昇封裝的技術能力，以因應未來漸趨激烈的競爭壓力。此外，IC產業為一種以製造及服務為導向的產業，其核心競爭力著重在準時交貨（On time delivery）。由於，近年更強調JIT（Just In Time）生產觀點，認為提前與延遲一樣都會造成成本之損失。因此，本研究提出一望目指標，以確實衡量交貨準確性。本研究所提出之創新派工結合了統計產出控制圖（Statistical Throughput Control，STC）與DA（Delivery Accurate）系統，期望能夠獲得較佳的交貨準確性。另本文強調「望目交貨時間（Nominal-the-best of due date）」，因此在交貨準確性的計算上採用品質損失函數的觀念，當訂單完成天數等於承諾工期時，損失為零；兩者差距越大，則損失愈大。並建構一模擬系統，模擬實際封裝廠的運作情形，利用STC結合DA系統之派工，比較其他傳統之派工法則，觀察本文提出之方法是否能夠較其他方法更有效提升交貨準確性。實驗結果顯示，本文所提出創新派工方法之交貨準確性在系統為非CONWIP（Constant-Work-In-Process）的情境下，均比其他派工方法有好的表現。

In the era of the knowledge economy with the 21st century, the application of the electronic products is becoming more extensive. The growth by a wide margin appears to the component demand of the semiconductor that results the demand for integrated circuit (IC) packaging increase. With the shortening of products life cycle and diversification of customer's demand, IC packaging industry must promote the technological ability of packaging constantly that is in order to deal with intense competition pressure gradually in the future. Furthermore, IC industry is oriented towards manufacturing and service that the key competitiveness is on time delivery. Due to the just-in-time (JIT) production is emphasized even more in recent years, it thinks that the earliness and tardiness will cause loss of the cost. Therefore, this study provides an index of nominal-the-best in order to measuring delivery accuracy. This study provides a novel dispatching rule that uses of statistical throughput control (STC) and delivery accurate (DA) system. It expects to obtain better delivery accuracy. Furthermore, this study focuses on nominal-the-best of due date that uses the concept of quality loss function (QLF) to measure delivery accuracy. When the cycle time equal to the promising due date that the loss is zero, and the greater the difference between cycle time and promising due date that the loss is bigger. In addition, a simulation system is constructed in order to simulate the actual situation of packaging and compare the novel dispatching rule with other traditional dispatching rule. The result shows the novel dispatching rule is batter than other dispatching rule in most scenarios when the system is not in constant-work-in-process (CONWIP).

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謝文樂，（民84），IC構裝製程與設備簡介，機械工業雜誌，第187-194頁。
鍾淑馨、黃宏文，（民88），晶圓製造廠生產作業控制策略之構建，中國工業工程學刊，第16卷，第1期，第93-113頁。
Barrett, R. and Kadipasaoglu, S.N., 1990, Dispatching rules for a dynamic flow shop, Production and Inventory Management Journal, 31, 54-58.
Chan, F.T.S. and Chung, S.H., 2005, Multicriterion genetic optimization for due date assigned distribution network problems, Decision Support Systems, 39, 661-675.
Chan, F.T.S., Chan, H.K., Lau, H.C.W., and Ip, R.W.L., 2003, Analysis of dynamic dispatching rules for a flexible manufacturing system, Journal of Materials Processing Technology, 138, 325-331.
Hicks, C. and Pongcharoe, P., 2006, Dispatching rules for production scheduling in the capital goods industry, International Journal of Production Economics, 104, 154-163.
Hino, C.M., Ronconi, D.P., and Mendes, A.B., 2005, Minimizing earliness and tardiness penalties in a single-machine problem with a common due date, European Journal of Operational Research, 160, 190-201.
Hopp, W.J. and Roof, M.L., 1998, Setting WIP levels with statistical throughput control (STC) in CONWIP production lines, International Journal of Production Research, 36, 867-882.
Hopp, W.J. and Spearman, M.L., 2001, Factory Physics, 2nd edition, McGraw-Hill, New York.
Kelton, W.D., Sadowski, R.P., and Sturrock, D.T., 2006, Simulation with Arena, 4th edition, McGraw-Hill, New York.
Kim, Y.D., Kim J.U., Lim, S.K., and Jun, H.B., 1998, Due-date based scheduling and control policies in a multiproduct semiconductor wafer fabrication facility, IEEE Transactions on Semiconductor Manufacturing, 11, 155-164.
Liao, C.J. and Cheng, C.C., 2007, A variable neighborhood search for minimizing single machine weighted earliness and tardiness with common due date, Computers and Industrial Engineering, 52, 404-413.
Lodree Jr, E., Jang, W., and Klein, C.M., 2004, A new rule for minimizing the number of tardy jobs in dynamic flow shops, European Journal of Operational Research, 159, 258-263.
Sung, C.S. and Min, J.I., 2001, flowshop with batch processing machine(s) for earlinesss/tardinesss measure under a common due date, European Journal of Operational Research, 131, 95-106.
Taguchi, G. and Yokoyama, T., 1993, Taguchi methods: design of experiments, Amer Supplier Instrument, Tokyo, Japan.
Thiagarajan, S. and Rajendran, C., 2005, Scheduling in dynamic assembly job-shops to minimize the sum of weighted earliness, weighted tardiness and weighted flowtime of jobs, Computers and Industrial Engineering, 49, 463-503.
Thomas, P.R. , 2000, Statistical Methods for Quality Improvement, 2nd edition, Wiley-Interscience, Canada.
Wagner, B.J. and Ragatz, G.L., 1994, The impact of lot splitting on due date performance, Journal of Operations Management, 12, 13-25.
Yang, T., Fu, H.P., and Yang, K.Y., 2007, An evolutionary-simulation approach for the optimization of multi-constant work-in-process strategy-A case study, International Journal of Production Economics, 107, 104-114.
Yang, T., Kuo, Y., and Chang, I., 2004, Tabu-search simulation optimization approach for flow-shop scheduling with multiple processors - a case study, International Journal of Production Research, 42, 4015-4030.
Zhu, Z. and Heady, R.B., 2000, Minimizing the sum of earliness/tardiness in multi-machine scheduling: a mixed integer programming approach, Computers and Industrial Engineering, 38, 297-305.