簡易檢索 / 詳目顯示

研究生: 歐育森
Ou, Yu-Sen
論文名稱: 金氧半場效電晶體之熱載子與負偏壓溫度效應之探討
Hot-carrier effects and NBTI in MOSFET's
指導教授: 陳志方
Chen, Jone-Fang
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2003
畢業學年度: 91
語文別: 英文
論文頁數: 47
中文關鍵詞: 熱載子負偏壓
外文關鍵詞: NBTI, hot-carrier
相關次數: 點閱:54下載:5
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 在本篇論文中我們探討n型金氧半場效電晶體的熱載子效應與p型金氧半場效電晶體的負偏壓溫度效應。
    熱載子效應的實驗結果發現元件的最快加速退化情況為閘極偏壓在最大基極電流時,而介面缺陷為最主要的影響機制。負偏壓溫度效應的實驗我們得到可用來推測元件在指定的溫度下可操作十年時的工作電壓的經驗公式。
    以上的實驗我們以ICS (Interactive Characterization Software) 軟體控制Agilent 4155B來對點一五微米製程技術的元件進行量測以達到我們的實驗目的。

    In this thesis, we discussed hot-carrier effects in n-MOSFET and negative bias temperature instability(NBTI) in p-MOSFET.
    In n-MOSFET, we found the worst case stress condition occurred under Vg=peak Isub at operating voltage, and interface traps are primary damage in n-MOSFET. In p-MOSFET, we have derived an empirical equation which can be used to extrapolate the 10 years operating voltage under a specified temperature.
    All of the experiments were performed by an Agilent 4155B semiconductor parameter analyzer, controlled by software called ICS (Interactive Characterization Software).

    Abstract (Chinese) I Abstract(English) II Acknowledgements III Table of Contents IV Figure Captions V List of Tables VIII Chapter 1 Introduction 1 Chapter 2 Basic Concepts and experiment setup 3 2.1 Basic Concepts 3 2.2 Experiment Setup 5 Chapter 3 Hot-carrier effects in n-MOSFET's 7 Chapter 4 Negative Bias Temperature Instability (NBTI) in p-MOSFET's 11 References 14

    [1]Zhi-Hong Liu, Chenming Hu, Jian-Hui Huang, Tung-Yi Chan, Min-Chie Jeng, Ping K. Ko and Y. C. Cheng, "Threshold voltage model for deep-submicrometer MOSFET's," IEEE Trans.Electron Devices, vol. 40, p.86, 1993

    [2]Luca Selmi, Enrico Sangiorgi, Roberto Bez, and Bruno Ricco, " Measurement of the hot hole injection probability fromSi into SiO2 in p-MOSFETs,"Electron Devices Meeting, Technical Digest,p.333,1993

    [3]Chenming Hu, Simon C. Tam, Fu-Chieh Hsu, Ping-Keung Ko, Tung-Yi Chan, and Kyle W. Terrill, "Hot-electron-induced MOSFET degradation -Model, monitor, and improvement" IEEE Trans.Electron Devices, vol. 32, p.375, 1985

    [4] T.Y. Chan, P.K. Ko, and C. Hu, "Dependence of channel electric field on device scaling," IEEE Electron Dev. Lett., EDL-6, 1985, p, 551

    [5] Jone F. Chen and Chih-pin Tsao, "A new observation in hot-carrier induced drain current degradation in deep-sub-micrometer nMOSFETs", Proceedings of the 9th IPFA, p.31, 2002

    [6]Paul heremans, rudi Bellens, Guido Groeseneken, and herman E. Maes, "Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFET's," IEEE Trans.Electron Devices, vol. 35, p.2194, 1988

    [7] N. Kimizuka, T. Yamamoto, T. Mogami K. Yamaguchi, K. Imai and T. Horiuchi, "The impact of bias temperature instability for direct - tunneling ultra - thin gate oxide on MOSFETs scaling," Symp. on VLSI Technol., 73,1999

    下載圖示 校內:2004-07-18公開
    校外:2004-07-18公開
    QR CODE