| 研究生: |
蔡忠信 Tsai, Chung-Hsing |
|---|---|
| 論文名稱: |
aEASI_散熱片貼合面平坦化研究 The planarization study of the aEASI heat sink pasting side. |
| 指導教授: |
周榮華
Chou, Jung-Hua |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 工程科學系碩士在職專班 Department of Engineering Science (on the job class) |
| 論文出版年: | 2022 |
| 畢業學年度: | 110 |
| 語文別: | 中文 |
| 論文頁數: | 55 |
| 中文關鍵詞: | 晶片內埋式封裝 、底片設計 、不對稱蝕刻 、濕蝕刻 |
| 外文關鍵詞: | chip embedded package, mask design, wet etching, asymmetry etching |
| 相關次數: | 點閱:145 下載:8 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
半導體的發展在幾十年來遵循摩爾定律下,製程上的微縮(more Moore)越來越困難;所以業界朝另一條more than Moore路線發展,以達到異質整合及3D堆疊的目的,其中aEASI (active Embedded Advanced System Integration),是屬於晶片內埋系統封裝的技術之一,將晶片埋入基板中,使得基板外原本要放置晶片的位置空出來,可以放別的電子元件,達到尺寸縮小,3D堆疊及異質整合的目的。
Etching back是aEASI獨有的技術,透過蝕刻的方式將背面不必要的支撐塊咬除(厚度約為90 μm),並且在正面還有32 μm銅厚的線路重佈層的狀況下,做不對稱銅厚的咬蝕。本論文研究氯化鐵蝕刻與釘架咬蝕的關係,並藉以調整底片開口的大小及間距來控制咬蝕量,在支撐塊的旁邊咬出容納綠漆的空間,讓綠漆低於散熱片貼合面,以避免散熱片在貼合時,造成品質異常。如何在一次蝕刻作業中,同時達到正面重佈層、背面支撐塊及容納綠漆的平台這三個項目的咬蝕,為本篇論文的研究目的。研究中指出透過咬蝕深度對應側蝕的回歸方程式可以用來預估底片開口大小,雖然預估值跟實際量測值有些許誤差,但經過幾次調整後還是可以達到預設的目的,文中也針對這些誤差做討論,並且成為後續測試的經驗,並且也從中觀察跟討論到ARDE(Aspect Ratio Dependent Etching)及micro loading effect的現象。
The development of semiconductor has followed Moore’s law for several decades, but is gradually facing the bottleneck of quantum tunneling effect. Thus, the process further minimization (more Moore) is more and more difficult. Therefore, another path in the semiconductor industry is more than Moore to achieve heterogeneous integration & 3D stacking. “aEASI” (active Embedded Advanced System Integration) is one of the latter case for achieving the chip embedded SiP technology. A chip is buried into the substrate, leaving its original position for placing another component to accomplish heterogeneous integration and 3D stacking, and reduce the package size at the same time.
Etching is used in aEASI for removing the backside support bar (Cu thickness round 90 μm) and the base on the top side (Cu thickness of 32μm) in an asymmetric way. This study investigates the consequence of lead frame wet etching by FeCl_3 first o obtain the design rule of the opening and space in the mask for controlling the etching amount. The etched space accommodates the solder mask near the support bar for which the solder mask must be lower than the heat sink pasting side to avoid the quality issue in the heat sink pasting process. How to etch the top side electric redistribution layer, the backside support bar, and the space accommodating the solder mask in a single etching process is the main focus of this study. The results show that with the deduced mask opening size through the initial experiments and some adjustments to reduce the variations, simultaneous etching of the above three locations can be achieved. Moreover, the ARDE and micro loading effect are also observed and discussed in this study.
1.Status of the Advanced Packaging Industry 2018-Advanced Package Roadmap, http://www.yole.fr/
2.ASE group embedded dei technology, https://ase.aseglobal.com/ch/technology/embedded_die
3.Ayón, R. Braff, C. C. Lin, H. H. Sawin, and M. A. Schmidt, “Characterization of a Time Multiplexed Inductively Coupled Plasma Etcher” Journal of The Electrochemical Society, Vol. 146 (1), pp. 339-349 (1999).
4.西中川遵,杉野 文弘, 宮嵜 武,“エッチング加工法における流動現象”ながれVol. 20, pp. 116-126 (2001).
5.西中川遵,宮嵜 武, 杉野 文弘,“斜め方向淀み線流によるエッチング加工法”日本流体力学会年会講演論文集 (2001).
6.Kazuma Kurihara, Young-Joo Kim and Kenya Goto, “High-Throughput GaP Microprobe Array having Uniform Aperture Size Distribution for Near-Field Optical Memory” Japanese Journal of Applied Physics Vol. 41, pp. 2034-2039 (2002).
7.Junghoon Yeom, Yan Wu, Mark A. Shannon, “Critical Aspect ratio Dependence in Deep Reactive Ion Etching of Silicon” The 12th International Conference on Solid State Sensors, Actuators and Microsystem, Vol, 2, pp. 1631-1634, Boston. June 8-12 (2003).
8.M. P. Rao, M. F. Aimi and N. C. MacDonald, “Single-Mask, Three-Dimensional Micro Fabrication of High-Aspect-Ratio Structures in Bulk Silicon Using Reactive Ion Etching Lag and Sacrificial Oxidation” Appl. Phys. Lett. Vol. 85, pp. 6281 (2004).
9.Chienliu Chang, YeongFeng Wang, Yoshiaki Kanamori, JiJheng Shih, Yusuke Kawai, ChihKung Lee, KuangChong Wu and Masayoshi Esashi. “Etching Sub-Micrometer Trenches by Using the Bosch Process and Its Application to The Fabrication of Antireflection Structures” Journal of Micromechanics and. Microengineering, Vol. 15, pp. 580–585 (2005).
10.S. L. Lai, D. Johnson, and R. Westerman, “Aspect Ratio Dependent Etching Lag Reduction in Deep Silicon Etch Processes” J. Vac. Sci. Technol. A, Vol. 24, 1283(2006)
11.Sudipta Chatterjee, Motoki Ujihara, Dong Gun Lee, Jerry Chen, Stanley Lei, and Greg P Carman, “Spray Etching 2 μm Features in 304 Stainless Steel” Journal of Micromechanics and. Microengineering, Vol. 16, pp. 2585–2592 (2006).
12.Kazushige Takechi, Hiroshi Kanoh, and Shigeyoshi Otsuki, “Very High Rate and Uniform Glass Etching with HF/HCl Sprayfor Transferring Thin-Film Transistor Arrays to Flexible Substrates” Japanese Journal of Applied Physics, Vol. 45, No. 7, pp. 6008–6010 (2006).
13.J. Tian, J. Iannacci, S. Sosin, R. Gaddi and M. Bartek, “RF-MEMS Wafer-Level Packaging Using Through-Wafer Via Technology” Electronics Packaging Technology Conference, pp.441-447, (2006).
14.Chenkuei Chung and Huichuan Lu, “Method for Reducing Reactive Ion Etching (RIE) Lag in Semiconductor Fabrication Process” United States Patent US 6,900,136 B2 (2006).
15.P Nageswara Rao and Deepak Kunzru, “Fabrication of Microchannels on Stainless Steel by Wet Chemical Etching” Journal of Micromechanics and. Microengineering, Vol. 17, pp. N99–N106 (2007).
16.J. Tian, M. Bartek, “Simultaneous Through-Silicon Via and Large Cavity Formation Using Deep Reactive Ion Etching and Aluminum Etch-Stop Layer” Electronic Components and Technology Conference, pp.1787-1792, (2008).
17.Hiroshi Kobayashi and Toshiyuki Horiuchi, “Novel Projection Exposure System Using Gradient-Index Lens Array” Japanese Journal of Applied Physics, Vol. 47, No. 7, pp. 5702–5707 (2008).
18.Jorge Albero, Lukasz Nieradko, Christophe Gorecki, Heidi Ottevaere, Virginia Gomez, Hugo Thienpont, Juha Pietarinen, Birgit Päivänranta and Nicolas Passilly, “Fabrication of Spherical Microlenses by a Combination of Isotropic Wet Etching of Silicon and Molding Techniques” Optical Society of America Vol. 17, No. 8, OPTICS EXPRESS 6285 (2009).
19.F. Staudegger, M. W. Hofbaur, and H.-J. Kruwinusa, “Analyses and Modeling of a Wet-Chemical-Etch Process on Rotating Silicon Wafers with an Impinging Etchant Jet” Journal of The Electrochemical Society, Vol. 156 (5), pp. H340-H345 (2009).
20.Lingjun Sun, Junsheng Liang, Chong Liu, Yuanbao Cao, Li Chen, and Junshan Liu, “Effects of The Initial Stencil Width on Stainless Steel Wet Chemical Etching: Combined Model and Experimental Investigations” Journal of Micromechanics and. Microengineering, Vol. 19, 085023 (8 pp) (2009).
21.Banqiu Wu, Ajay Kumar, and Sharma Pamarthy “High Aspect Ratio Silicon Etch: A Review”, Journal of Applied Physics, Vol. 108, 051101 (2010).
22.M. Baranski,J. Albero,R. Kasztelanic,and C. Gorecki, “A Numerical Model of Wet Isotropic Etching of Silicon Molds for Micro-Lenses Fabrication” Journal of The Electrochemical Society, 158 (11), pp. D681-D688 (2011).
23.Yuchen Hu, Chenghao Chiang, Kuohua Chen, Chitsung Chiu, Chingte Chuang, Wei hwang, Jinchern Chiou, Homing Tong, and Kuanneng Chen, “Micro-Masking Removal of TSV and Cavity during ICP Etching Using Parameter Control in 3D and MEMS Integrations” IMPACT International Microsystems, Packaging, Assembly and Circuits Technology conference, pp. 367-369 (2012.)
24.H Han, Y Nakagawa, Y Takai, K Kikuchi, S Tsuchitani and Y Kosimoto, “Microstructure Fabrication on a β-phase PVDF Film by Wet and Dry Etching Technology” Journal of Micromechanics and. Microengineering, Vol. 22, 085030 (8 pp) (2012)
25.Mingjie Zhao, Linfeng Lan, Hua Xu, Miao Xu, Min Li, Dongxiang Luo, Lei Wang, Shangsheng Wen, and Junbiao Peng, “Wet-Etch Method for Patterning Metal Electrodes Directly on Amorphous Oxide Semiconductor Films” ECS Solid State Letters, 1 (5), pp. 82-84 (2012).
26.Yifan Zhou, Sihai Chen, Samson Edmond, and Alain Bosseboeuf, “Deep Wet Etching in Hydrofluoric Acid, Nitric Acid, and Acetic Acid of Cavities in a Silicon Wafer” Japanese Journal of Applied Physics, Vol. 52, 076503 (2013).
27.Xiaolei Chen, Ningsong Qua, Xiaolong Fang, and Di Zhua, “Reduction of Undercutting in Electrochemical Micro-Machining of Micro-Dimple Arrays by Utilizing Oxygen Produced at The Anode” Surface & Coatings Technology Vol. 277, pp. 44-51 (2015).
28.Zhongmei Han, Marko Vehkamäki, Markku Leskelä, and Mikko Ritala, “Resistless Fabrication of Embedded Nanochannels by FIB Patterning, Wet Etching and Atomic Layer Deposition” Proceedings of the 15thIEEE International Conference on Nanotechnology, pp. 1008-1011, July 27-30 (2015).
29.Fei Xin, Ting Ma, and Qiuwang Wang, “Spray Etching Rate Development of Stainless Steel in The Etchant for Printed Circuit Heat Exchanger Channels” Energy Procedia Vol. 105, pp. 4828-4835 (2017).
30.Daeun Kim, Sungwoon Cho, Sungchan Kim, Wonjun Kang, and Hyungkoun Cho, “Corrosion Behavior and Metallization of Cu-Based Electrodes Using MoNi Alloy and Multilayer Structure for Back-Channel-Etched Oxide Thin-Film Transistor Circuit Integration” IEEE Transactions on Electron Devices Vol. 64, pp. 447-454 (2017).
31.Fei Xin, Ting Ma, Yitung Chen, and Qiuwang Wang, “Two-Dimensional Chemical Etching Process Simulation for Printed Circuit Heat Exchanger Channels Based on Cellular Automata Model” Heat Transfer Engineering, Vol. 39, NOS. 7-8, pp. 617-629 (2018).
32.Jean Pol Delrue, Roman Ostholt, and Norbert Ambrosius, “Glass Wafer Level Packaging Enabled by Laser Induced Deep Etching of Closed Cavities”, 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC), pp. 1-5 (2019).
33.Toshiyuki Horiuchi, Yuta Kazama, Hiroya Yoshida, Akira Yanagida, and Hiroshi Kobayashi “Application of Projection Lithography Using a Gradient-Index Lens Array and Wet Etching to Texturing for Control of The Hydrophobic Properties of Stainless-Steel Plates” Japanese Journal of Applied Physics, Vol. 58, SDDA01 (2019).
34.Fei Xin, Ting Ma, Yitung Chen, and Qiuwang Wang, “Study on Chemical Spray Etching of Stainless Steel for Printed Circuit Heat Exchanger Channels” Nuclear Engineering and Design, Vol. 341, pp. 91–99 (2019).
35.ASE internal report for presentation “aEASI Technology Introduction” Jun. 15 (2020)
36.ASAHI Kasei - dry film UFG-258 data sheet (2013).
37.科美力亞乾膜壓合機操作手冊(2013).
38.科美力亞曝光機操作手冊(2013).
39.中日噴霧噴嘴型錄Jun. (2010).
40.Nikon Measuring microscope MM-400, https://www.nikonmetrology.com/en-gb/optical-measuring/measuring-microscopes-mm-400-800
41.Keyence VK-X200 series, https://www.keyence.com.tw/products/microscope/laser-microscope/vk-x100_x200/index_pr.jsp