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研究生： 郭貫中
Guo, Guan-Jhong
論文名稱： 應變矽鍺穿隧場效電晶體之模擬
Modeling and Simulation of Strained SiGe TFETs with Vertical Tunneling
指導教授： 高國興
Kao, Kuo-Hsing
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 奈米積體電路工程碩士博士學位學程
MS Degree/Ph.D. Program on Nano-Integrated-Circuit Engineering
論文出版年： 2016
畢業學年度： 104
語文別： 英文
論文頁數： 35
中文關鍵詞： 穿隧場效電晶體 、矽鍺合金 、應變矽鍺 、壓縮應變 、異質接面
外文關鍵詞： TFET, SiGe alloy, strained, compressive strained, heterojunction
相關次數： 點閱：105  下載：4 
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    • 隨著科技技術快速的發展，人們對於電子產品的要求變得趨向於便利性、低功率消耗以及高操作速度。而在傳統MOSFET微小化的過程中會遇到很多元件的特性與製程上難題。為了解決或避免眾多困難點，因此一些新穎的元件陸續的被提出。
    本篇論文主要是探討TFET的特性。穿隧場效電晶體(Tunnel-FET)是未來具有發展性的元件之一，比起傳統金氧半場效電晶體(MOSFET)，TFET具有兩項最主要的優點： (1)載子傳輸為穿隧機制，次臨界斜率(SS)不會被限制在60mV/dec的物理極限 (2)擁有非常低的漏電流(Ioff)，適合運用在低功率消耗(Low operate power)或低待機電力(LSTP-Low Standby Power)電子產品上。儘管具有此優點，TFET發展不如預期的原因是導通電流(Ion)無法達到與MOSFET同樣的程度。因此，本研究著重於如何改善TFET的元件性能。本篇論文從兩個面向去改善元件性能，一是利用特殊的結構，形成垂直式穿隧電流而得到較優異的Ion；二是利用SiGe合金與應變技術所形成的低能隙的性質去改善Ion。最後再利用Sentaurus TCAD軟體分析不同的結構參數與材料參數所對應的元件特性。

    As development of technological technique, the requirement of electrical production tend to convenient, low power consumption, high speed velocity. There will cause many difficult problems of manufacture process and device characteristic when scale down traditional MOSFET. In order to avoid nonideal phenomenon, some novel devices are presented continually.
    In this thesis, we will discuss structure of Tunnel FET mainly. TFET is a promising device in the future due to it possesses two main advantages: (1) the mechanism of transmission of carriers is by tunneling rather than by diffusion; therefore, SS cannot be limited at 60mV/decade. (2) Comparing MOSFET with TFET, TFET possesses very low off current, it properly apply to low operate power or LSTP-Low Standby Power. Though TFET possesses two excellent merits, on current cannot achieve same level of MOSFET yet. Therefore, we will concentrate on how to improve performance of TFET. In this study, we utilize two ways to increase on current, The one is using SiGe alloy and strained technique which is generated by growing SiGe on Si-sub. Another way is using special structure which include vertical tunneling. Finally, we will consider some different parameters in TFET’s simulation and analysis corresponding characteristic of different parameters.

    中文摘要 i ABSTRACT ii 誌謝 iii CONTENTS iv TABLE CAPTIONS vi FIGURE CAPTIONS vii Chapter 1. Introduction and Motivation 1 1.1 Power Dissipation in Advanced CMOS 1 1.2 Definition of Subthreshold Swing 1 1.3 Principle Operation of Tunnel Field Effect Transistor 2 1.4 Research Objective 3 Chapter 2. Band-to-Band Tunneling within SiGe Alloy 6 2.1 Band-to-Band Tunneling and Kane’s Model 6 2.2 Properties of Relaxed SiGe Alloy 7 2.3 Strained SiGe and 30-Band K‧P Model 8 2.3.1 K‧P Model 10 2.3.2 6-Band K‧P Model 12 2.3.3 30-Band K‧P Model 13 2.4 Band Structure Discussion 14 2.5 Extract Kane’s Model Parameter 15 Chapter 3. An Brief Introduction to TFET 19 3.1 Point and Line TFETs Introduction 19 3.2 Field Induced Quantum Confinement 21 3.3 Line TFET and Pocket 22 Chapter 4. Simulation and Analysis 24 4.1 Models in Simulation 24 4.2 Tunnel Field Effect Transistor Structure in Simulations 25 4.3 Result Analysis and Discussion 26 Chapter 5. Conclusion and Future Direction 33 5.1 Conclusion 33 5.2 Future Direction 33 Reference 35

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