隨著半導體技術的進步，元件越小且越快，但尺寸的微縮終究存在著極限。因此，提升元件密度與效能是一個方向，其中獨立雙閘極鰭式電晶體與興新非揮發記憶體便是有利的候補。本論文提出藉由化學機械研磨與自對準合併的製程製備可與傳統鰭式電晶體整合之獨立雙閘極鰭式電晶體，並探討何種新興非揮發記憶體較適合該元件，其中鐵電材料在各方面表現優秀，且較能發揮獨立雙閘極鰭式電晶體的雙閘優勢，因此選其整合製備成鐵電獨立雙閘極鰭式電晶體。
非鐵電元件從比較單閘、雙閘與傳統鰭式電晶體操作，確認雙閘操作與傳統鰭式電晶體相像，且特性較單閘操作來的好。接著探討不同背閘極對前閘極電性如電流、次臨界擺幅、臨界電壓的影響，其中臨界電壓除了定電流與線性外插法，額外使用了轉導線性外插法萃取，確認非共閘操作無論哪種萃取方法皆可以實現調變前閘極臨界電壓，並額外探討鰭式通道寬度對臨界電壓的影響。最後針對鐵電元件量測確認前後閘極可獨立儲存資料，實現兩倍的元件儲存密度。

With the advancements of semiconductor technology, electronic devices have been made smaller and faster. However, they can’t scale down endlessly due to physical limitations. Therefore, alternative methods to increase memory density and performance is required, among which the independent-double-gate FinFET(IGFinFET) structure and emerging non-volatile memory(e-NVM) materials are favorable candidates. This thesis proposes a novel process which can fabricate compatible IGFinFET and conventional FinFET on the same wafer by CMP and a self-aligned gate separation process via dry etching, and discuss which emerging NVM material is suitable for IGFinFET. Among them, ferroelectric material has better performance and can exploit IGFinFET’s dual gate advantage, so we choose it to fabricate FeIGFinFET.
For non-ferroelectric device, we compare single gate, double gate and conventional FinFET operation, and noticed that double gate operation for our proposed IGFinFET structure is similar to conventional FinFET operation and has even better characteristics, and also discuss the on current changes caused by different fin width. Then we discuss back gate bias variation impact on front gate behavior, like current, subthreshold swing and threshold voltage. We not only explored threshold voltage extraction methods like constant current and linear extrapolation method but also uses transconductance linear extrapolation method, and find that no matter what methods are used, threshold voltage can adjust by back gate. We further investigate the impact of fin width on threshold voltage. Finally, we confirm FeIGFinFET can storage data at the front and back gates independently, and accomplish twice the storage density.

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