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研究生: 謝佳琪
Hsieh, Chia-Chi
論文名稱: 基於BSIM-CMG之完全空乏型先進CMOS低溫元件模型
Compact Modeling of Advanced Fully-Depleted CMOS at Cryogenic Temperatures with BSIM-CMG
指導教授: 盧達生
Lu, Darsen
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2022
畢業學年度: 110
語文別: 英文
論文頁數: 61
中文關鍵詞: BSIM-CMG亞閾值擺幅閾值電壓遷移率低溫
外文關鍵詞: BSIM-CMG, subthreshold swing, threshold voltage, mobility, cryogenic
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  • 隨著科技的進步,人工智慧及物聯網越來越深入日常生活,此時能夠高速處理資料和執行複雜運算的高效能運算晶片變得日益重要,如何降低耗能也成為另一個重要且迫切的問題。在低溫下操作元件能夠改善亞閾值擺幅,不僅降低功耗還可以提升運算表現。
    本篇研究首先建立一個參數萃取平台,以目前業界通用的鰭式電晶體元件模型BSIM-CMG為基礎,由於此模型並沒有加入低溫的效應,因此我們考慮亞閾值擺幅在低溫會接近飽和的趨勢、分析低溫下的閾值電壓和遷移率、統整使用到的參數及其對模型的意義、討論目前BSIM-CMG沒辦法同時吻合低溫下次臨界區和反轉區的閾值電壓並提出兩種想法去解決,一個是調整擴散電流,另一個則是調整平帶電壓的值。最後針對兩個閘極電壓範圍,分別提出可以同時吻合300K、210K、160K、110K、77K、36K的參數組合。

    With the advancement of technology, Artificial Intelligence and the Internet of Things are becoming increasingly deeply rooted in our daily lives. High performance computing chips which process data at high speed and perform complex calculations are becoming increasingly crucial. The way of reducing power consumption has become another important and urgent issue. Operating devices at low temperatures improves subthreshold swing which reduce the power consumption and enhance the computing performance.
    In this research, we first establish a parameter extraction platform based on the BSIM-CMG, which is a common FinFET model in the industry. Yet this model does not incorporate the effect of low temperature, we consider the trend of subthreshold swing saturation at low temperature. Then we analyze the threshold voltage and mobility at low temperature, and sort the using parameters and their effects to the model. We discuss the reason why the current BSIM-CMG is unable to match the threshold voltage of the sub-threshold region and strong inversion region simultaneously at cryogenic temperatures. In order to solve this problem, we propose two ideas. One is by adjusting diffusion current. The other is by modifying the flat-band voltage. In the end, focusing on the separate ranges of gate voltage, we propose parameter sets that can simultaneously fit at 300K, 210K, 160K, 110K, 77K, and 36K.

    摘要 I Abstract II Acknowledgement III Content IV List of Figure VI List of Table IX Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Research Objective 4 Chapter 2 Methodology 5 2.1 Environment 5 2.1.1 Compiled Verilog-A code for using in Python 5 2.1.2 Python function used in parameter extraction 6 2.2 Fitting Steps 8 2.2.1 Fixed Parameters 9 2.2.2 Linear Id-Vg 11 2.2.3 Saturation Id-Vg 11 2.2.4 Other Effects 12 2.3 Cryogenic Temperature Physics 13 2.3.1 Subthreshold Swing 13 2.3.2 Threshold Voltage 17 2.3.3 Mobility 20 2.4 Important Parameters 21 Chapter 3 Results and Discussion 26 3.1 Data Preparation 26 3.1.1 Referential Paper Data 26 3.1.2 Fixed parameters 27 3.1.3 Problems need to be solved 30 3.2 Modifying the Subthreshold Swing 33 3.3 Modifying the Threshold Voltage 36 3.4 Modifying the Mobility and Extraction of Id-Vd 40 3.4.1 Optimize the fitting function 40 3.4.2 Extraction of sub-threshold region 42 3.4.3 Extraction of linear region 43 3.4.4 Extraction of saturation region and Id-Vd 47 3.5 Summary of the parameter extraction 48 3.5.1 Gate voltage from 0 to 1V 48 3.5.2 Gate voltage from 0.3 to 0.8V 52 Chapter 4 Conclusions and Future Work 55 4.1 Conclusions 55 4.2 Future Work 56 Answers to Thesis Defense Questions 57 Reference 60

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