隨著電子元件科技的發展，功率元件的特性亦不斷的被改良，其中，橫向的功率元件具有可以將其積體化的優勢，隨著結構上的演進，氧化層溝槽已被應用於橫向元件以增加飄移區的長度，而氧化層溝槽的產生讓我們察覺了潛在的可能性，藉由模擬軟體Sentaurus TCAD的幫助下，我們對氧化溝槽中的介電常數以及在製程中所造成熱應力帶來的影響做了研究，由於大面積的介電質存在結構中，介電常數的變化讓整體的電場分布有著顯著的改變，對於熱膨脹係數的差異而導致的形變，有著張力或是壓力在與溝表面的飄移區中作用，除了造成了能帶的窄化，還有飄移率的增強，而這些參數最終決定了此元件的崩潰電壓的提升與否。
我們發現，當氧化溝槽中的介電常數增加時，電場被侷限在電極的介面處，局部的集中會讓元件提早崩潰。當介電層的膨脹系數增加時，飄移區的應力形成從張力變為壓力，而飄移率的主導讓平均碰撞路徑上升，因而延後元件的崩潰。

With the development of electronic component technology, electrical characteristics of power devices has been improved continuously. Among them, the lateral power device has the advantage for being integrated with other electronic components on the same ship.
With the evolution of the structure, the trench oxide layer has been applied to the lateral diffuse MOSFET, in order to increase the length of the drift region. The formation of oxide trenches allows some potential possibilities. In this thesis, we have investigated not only the impacts of value of dielectric constant in the trench but also thermal strain at interface between silicon and oxide due to different thermal expansion coefficients. Those researches relies on Sentaurus technology computer-aided design (TCAD) which shows that since a large area of dielectric exists in the structure, the variation of dielectric constant makes the entire electric field distribution have a significant change. For the different thermal expansion coefficient between the two materials, the tension or compressive strain will present in the drift region around the interface. In addition to the bandgap narrowing, there is also an enhancement for mobility. These parameters eventually determine whether the breakdown voltage of this device is improved or not.
We found that the breakdown voltage is decreased by 28.67% when increasing the oxide dielectric constant from 3.9 to 8. The mobility (saturating velocity) is increased by 6.75% when the thermal expansion coefficient of oxide is 1×10^(-5) ("k" ^(-1)), compared to 1×10^(-6) ("k" ^(-1))of bulk Si and 1.37×10^(-6) ("k" ^(-1)) of SiO2.

Advanced Power MOSFET Concepts
250V Integrable Silicon Lateral Trench Power MOSFETs with Superior Specific On-Resistance
N. Fujishima and C. A. T. Salama, " A trench lateral power MOSFET using self-aligned trench bottom contact holes", in International Electron Device Meeting Tech Digest, pp. 359-362, 1997.
N.Fujishima, A.Sugi, T. Suzuki, S.Kajiwara, K.Matsubara, Y.Nagayasu, and C.A.T. Salama, "A High Density, Low On-resistance Trench lateral Power MOSFEt with a Trench Bottom Source Contact," in IEEE Transactions on Electron Devices, Vol. 49, No. 8, pp. 1462- 1468, August 2002.
A new structure and its analytical model for the electric field and breakdown voltage of SOI high voltage device with variable-k dielectric buried layer
H. Okumura, “A roadmap for future wide bandgap semiconductor power electronics,” in MRS Bull. (Power Electronics with Wide Bandgap Materials), vol. 40, no. 5, pp. 439-444, May 2015
J. A. Appels and H. M. J. Vaes, "High voltage thin layer devices (RESURF devices)," 1979 International Electron Devices Meeting, Washington, DC, USA, 1979, pp. 238-241, doi: 10.1109/IEDM.1979.189589.
B. Jayant Baliga. 2008. Fundamentals of Power Semiconductor Devices (1st. ed.). Springer Publishing Company, Incorporated.
Li H, Huang H M and Chen X B 2018 An improved SOI trench LDMOST with double vertical high-k insulator pillars J. Semiconduct. 39 094009
Sentaurus Device, Synopsys, Inc., Mountain View, CA, 2017
J. W. Slotboom Wd H. C. DeGraaf, “Measurements of bandgap narrowing m Si bipolar tranwstors,” Solid-State Electron., vol. 19, pp. 857-862, 1976
F. E. Mamouni et al., “Gate-Length and Drain-Bias Dependence of Band-To-Band Tunneling (BTB) Induced Drain Leakage in Irradiated Fully Depleted SOI Devices,” Vabderbilt MURI meeting,May 2008.
S.M. Sze Kwok K. Ng, Physics of Semiconductor Devices 3rd Edition, New York: John Wiley,2006
I. Goroff and L. Kleinman, “Deformation Potentials in Silicon. III. Effects of a General Strain on Conduction and Valence Levels,” Physical Review, vol. 132, no. 3, pp. 1080–1084, 1963.
G. L. Bir and G. E. Pikus, Symmetry and Strain-Induced Effects in Semiconductors, New York: John Wiley & Sons, 1974.
Y. Sun, S. E. Thompson and T. Nishida, "Physics of strain effects in semiconductors and metal-oxide-semiconductor field-effect transistors", J. App. Phys., vol. 101, pp. 104503 1-104503 22, 2007.
M. V. Fischetti and S. E., Laux Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys, Journal of Applied Physics 80, 2234 (1996)
Tae Ho YoonHyung Sang ParkYong Min Yoo, Method of Depositing Silicon Oxide Film by Plasma Enhanced Atomic Layer Deposition at Low Temperature, 2010-10-07, US20100255218A1
D. Gräf, U. Lambert, M. Brohl, A. Ehlert, R. Wahlich and P. Wagner, The Electrochemical Society Improvement of Czochralski Silicon Wafers By High‐Temperature Annealing, Journal of The Electrochemical Society, Volume 142, Number 9
R.D. Doherty, Current issues in recrystallization: a review, Materials Science and Engineering: A Volume 238, Issue 2, 15 November 1997, Pages 219-274
P. Yang, W. S. Lau, S. W. Lai, V. L. Lo, L. F. Toh, J. Wang, et al., "Mechanism for improvement of n-channel metal-oxide-semiconductor transistors by tensile stress", J. Appl. Phys., vol. 108, no. 3, pp. 034506-034511, Aug. 2010.
T. Lackner, "Avalanche multiplication in semiconductors: a modification of Chynoweth's law", Solid State Electron., vol. 34, no. 1, pp. 33-42, 1991.