| 研究生: |
葉承瑄 Yeh, Cheng-Hsuan |
|---|---|
| 論文名稱: |
以 FPGA 實現一基於 HOG 及 SVM 的即時人臉偵測系統 FPGA Implementation of a Real-Time Face Detection System Based on HOG and SVM |
| 指導教授: |
陳進興
Chen, Chin-Hsing 張名先 Chang, Ming-Xian |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電腦與通信工程研究所 Institute of Computer & Communication Engineering |
| 論文出版年: | 2024 |
| 畢業學年度: | 112 |
| 語文別: | 英文 |
| 論文頁數: | 74 |
| 中文關鍵詞: | 現場可規劃邏輯電路 、即時 、HOG 、線性 SVM |
| 外文關鍵詞: | FPGA, real-time, HOG, linear SVM |
| 相關次數: | 點閱:83 下載:6 |
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人臉偵測技術用於圖像或影片中自動識別和定位人臉位置,廣泛應用於安防監控、智能攝影機、影像分類等領域。這項技術提升了影像處理的效率,為公共安全和人機互動提供了重要的幫助,目前已成為智能系統中不可或缺的功能。
本篇論文提出了一個基於 HOG(Histograms of Oriented Gradients)特徵和 SVM(Support Vector Machine)分類器的實時人臉識別系統,實現在現場可程式化邏輯閘陣列(FPGA)上。系統使用 TRDB-D5M 攝影機捕捉原始數據,將其轉換為灰階圖像並存儲於 SDRAM 中。VGA 控制模組隨後從 SDRAM 讀取圖像,運用 HOG 演算法提取特徵,再由訓練好的 SVM 分類器判斷各窗口是否包含人臉,將結果存儲於 RAM中。最後,VGA 控制模組將 SDRAM 中的灰階圖像與 RAM 中的數據結合,生成帶有框選人臉範圍的圖像並輸出至顯示器。
此系統能以每秒 60 張 640x480 解析度影像的速度運作,SVM 人臉偵測準確率達到 86%,並使用了 79%的 FPGA 邏輯單元資源及17%的區塊記憶體資源。實驗結果顯示,系統能準確偵測水平和上下移動的人臉,對前後移動的容忍範圍為 10 公分,對水平傾斜容忍範圍為 10 度,對水平旋轉容忍範圍為 3 度。為了節省硬體資源和區塊記憶體,我們採用了近似計算來取代原始公式,並利用 FPGA 上的 SDRAM 來存儲原始圖像和框選人臉範圍的新影像。
Facial detection technology is used to automatically identify and locate faces in images or videos. It is widely applied in fields such as security surveillance, smart cameras, and image classification. This technology enhances image processing efficiency and provides significant support for public safety and human-computer interaction, making it an indispensable function in modern intelligent systems.
This thesis proposes a real-time face detection system based on HOG (Histograms of Oriented Gradients) features and an SVM (Support Vector Machine) classifier, implemented on a Field Programmable Gate Array (FPGA). The system uses a TRDB-D5M camera to capture raw data, converts it to grayscale images, and stores it in SDRAM. The VGA control module then reads the images from SDRAM, uses the HOG algorithm to extract features, and employs a trained SVM classifier to determine whether each window contains a face, storing the results in RAM. Finally, the VGA control module combines the grayscale images from SDRAM with the data from RAM to generate images with highlighted face regions and outputs them to the display.
This system operates at a speed of 60 frames per second with a resolution of 640x480, achieving an SVM face detection accuracy of 86%, while utilizing 79% of the FPGA logic unit resources and 17% of block memory resources. Experimental results show that the system can accurately detect faces during horizontal and vertical movements, with a tolerance range of 10 centimeters for forward-backward movement, 10 degrees for horizontal tilting, and 3 degrees for horizontal rotation. To conserve hardware resources and block memory, we employed approximate calculations to replace the original formulas and utilized the FPGA’s SDRAM to store the original images and the new images with the detected face regions.
[1] M. Asadi Shirzi and M. R Kermani, “Real-time point recognition for seedlings using kernel density estimators and pyramid histogram of oriented gradients”, In Actuators, page 81, 2024.
[2] M. Bakiri, C. Guyeux, J. Couchot and A. Oudjida, “Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses”, Computer Science Review, pages 135–153, 2018.
[3] P. Chen, C. Huang, C. Lien and Y. Tsai, “An efficient hardware implementation of HOG feature extraction for human detection”, IEEE Transactions on Intelligent Transportation Systems, pages 656–662, 2013.
[4] X. Chen, J. Xu and Z. Yu, “A fast and energy efficient FPGA-based system for real-time object tracking”, Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, pages 965–968, 2017.
[5] N. Dalal and B. Triggs, “Histograms of oriented gradients for human detection”, IEEE computer society conference on computer vision and pattern recognition, pages 886–893, 2005.
[6] C. Ding, T. Bao and H. Huang, “Quantum-inspired support vector machine”, IEEE Transactions on Neural Networks and Learning Systems, pages 7210–7222, 2021.
[7] M. Hasan, M. Ahsan, S. Newaz and G. Lee, “Human face detection techniques: A comprehensive review and future research directions”, Electronics, page 2354, 2021.
[8] M. Mirbod and M. Shoar, “Intelligent concrete surface cracks detection using computer vision, pattern recognition, and artificial neural networks”, Procedia Computer Science, pages 52–61, 2023.
[9] S. Mohamed, W. Sayed, A. Radwan and L. Said, “FPGA implementation of reconfigurable CORDIC algorithm and a memristive chaotic system with transcendental nonlinearities”, IEEE Transactions on Circuits and Systems I: Regular, pages 2885–2892, 2022.
[10] M. Wang and Z. Zhang, “FPGA implementation of HOG based multi-scaler pedestrian detection”, IEEE International Conference on Applied System Invention, pages 1099–1102, 2018.
[11] H. Wang, Z. Zhang, X. Chen and Y. Wang, “VGA display driver design based on FPGA”, IEEE/ACIS 18th International Conference on Computer and Information Science, pages 530–535, 2019.
[12] H. Zhou and G. Yu, “Research on pedestrian detection technology based on the SVM classifier trained by hog and LTP features”, Future Generation Computer Systems, pages 604–615, 2021.