氧化銦鎵鋅薄膜電晶體，因其具有潛力應用於液晶面板上做為驅動與畫素開關的元件，並且可應用在新穎的全透明電路與軟性電子上，己引發熱烈的研究。然而，目前已知的氧化銦鎵鋅薄膜電晶體仍存在過高的臨界電壓、太大的次臨界擺幅與過大的操作電壓等缺點，使其在應用上仍有限制。這個原因主要是一般的氧化銦鎵鋅薄膜電晶體使用了低介電係數的材料(例如二氧化矽) 作為閘極介電層，因此造成了較差的閘極控制力。為了克服這個低介電閘極所造成的問題，本研究選用high-材料做為薄膜電晶體之閘極介電層。於眾多高介電係數材料之中，二氧化鉿是一很好的選擇，因其具有高介電係數以及足夠寬的能隙寬度。然而正如其應用在互補式金氧半場效電晶體的缺點一樣，二氧化鉿存在過高
的缺陷密度將會阻礙它應用在薄膜電晶體的領域。因此在本論文中，我們在二氧化鉿融入矽元素以及氧元素以形成氧化矽鉿，以此高介電係數的化合物作為閘極介電層來製作氧化銦鎵鋅薄膜電晶體。
在本論文中，我們主要探討氧化矽鉿厚度及退火條件對薄膜電晶體的特性的影響。我們以氮化鉭作為金屬閘極材料，搭配氧化矽鉿作為閘極介電層來製作氧化銦鎵鋅薄膜電晶體。同時製作氮化鉭/氧化矽鉿/鋁結構的金屬/絕緣層/金屬(Metal-Insulator-metal, MIM)電容來評估氧化矽鉿的值與薄膜電晶體之載子遷移率。物性分析方面我們利用X 光繞射分析 (XRD)、化學分析電子儀(XPS)與掃描式電子顯微鏡(SEM)分析氧化銦鎵鋅薄膜及氧化矽鉿薄膜。經由量測出之3.4 fF/m2 的電容值與40 nm的物理厚度，我們計算出氧化鑭鉿的值為15。在實驗中我們發現以沉積時間為二分鐘的氧化銦鎵鋅通道搭配沉積八分鐘的氧化矽鉿閘極介電層之元件特性表現最好。電晶體之特性量測包括IDS-VDS 和IDS-VGS 特性，實驗結果顯示電晶體之開關電流比約為105，另由IDS-VGS 萃取出臨界電壓約為0.005V，次臨界擺幅為0.11 V/decade，而通道中的載子遷移率為12.7 cm2V-1s-1。
由實驗結果顯示，以氮化鉭為金屬閘極搭配閘極介電層HfSiO 的結構，極適用於氧化銦鎵鋅薄膜電晶體，對於TFT-LCD 的應用深具潛力◦

Indium-Gallium doped ZnO (IGZO) thin-film-transistors (TFTs) have attracted considerable attention due to their potentials toward new driving and pixel switch components for liquid crystal display and novel applications such transparent and flexible electronics. However, most of IGZO TFTs suffered from high threshold voltage (VT), poor subshreshold swing (SS), and high operation voltage, still setting a limit on their applications. These issues mainly result from the use of gate dielectrics with low- values (such as SiO2 and Si3N4) which usually leads to poor gate control on the channel current. To overcome the problems originated from using conventional gate dielectrics, high- materials are prospective substitutes for SiO2 as the gate dielectrics for the IGZO TFTs. Among high- materials, Hafnium oxide (HfO2) was proposed as a potential dielectric material for its high dielectric constant and wide bandgap. However, its drawback of high charge trap density as in the CMOS applications may retard its further application in the field of TFTs. Attempts have been made in the present work to incorporate silicon (Si) into HfO2 to form HfSiO as the gate dielectrics to reduce charge trap density for the fabrication of IGZO TFTs .
In this thesis, IGZO TFTs with Tantalum nitride (TaN) and hafnium silicon oxide (HfSiO) as the gate electrode and gate insulator, respectively, were fabricated and characterized. The influences of thicknesses and post deposition annealing (PDA) conditions of the sputtering deposited HfSiO dielectric films on the TFT characteristics was investigated. MIM capacitors with TaN/HfSiO/Al structure were also prepared to evaluate the dielectric constant of high-material and channel mobility. The physical properties and compositions of IGZO films and HfSiO films were examined by SEM, XRD, and XPS analysis. Based on the highest capacitance of 3.4 fF/m2 and the physical thickness of 40 nm, the dielectric of HfSiO was estimated to be about 15. According to experimental Ids-Vds and Ids-Vgs characteristies of the prepared TFTs, it suggests that the processing condition for the IGZO channel obtained form a 2-min sputtering deposiotn and HfSiO obtained from using a 8-min sputtering deposition followed by a PDA of 400oC, 5 minutes in oxygen ambient could offer the most satisfied device perforamcnes. The Ion/Ioff ratio, threshold voltage, subthreshold swing, and mobility obtained from the fabricated IGZO-TFTs with TaN(50 nm)/HfSiO(40 nm)/Al(300 nm) structure were 105, 0.005 V, 0.11 V/dec, and 12.7 cm2V-1s-1, respectively.
In summary, our experimental results revealed that HfSiO gate dielectrics work well for future InGaZnO-TFTs.

[1] G. H. Heilmeier, L. A. Zanoni, L. A. Barton, “Dynamic scattering-A new electrooptic effect in nematic liquid crystals,” Proceedings of the IEEE, Vol. 56, pp. 1162-1171, 1968.
[2] T. P. Brody, J. A. Asars, G. D. Dixon,“A 6 × 6 inch 20 lines-per-inch liquid-crystal display panel,” IEEE Trans. on Electron Devices, Vol. 20, pp. 995-1001, 1973.
[3] H. Kimura, T. Maeda, T. Tsunashima, T. Morita, H. Murata, S. Hirota, H. Sato, “A 2.15 inch QCIF reflective color TFT-LCD with digital memory on glass (DMOG),” Proceedings of the SID, pp. 268-270, 2001.
[4] S. B. Ogale, Thin films and heterostructures for oxide for oxide electronics, New York, NY: Springer, 2005.
[5] C. Jagadish and S. Pearton, Zinc oxide bulk, thin films and nanostructure, Oxford, UK: Elsevier, 2006.
[6] U. Ozgur, Y. I. Alivov, C. Liu, A. Teke,M. A. Reshchikov, S. Dogan,V. Avrutin, S.-J. Cho, and H. Morkoc, "A comprehensive review of ZnO materials and devices," J. Appl. Phys., Vol. 98, pp. 041301-1–041301-103, Aug. 2005.
[7] A. Janotti and C. G. Van de Walle, “Fundamentals of zinc oxide as a semiconductor,” Rep. Prog. Phys., Vol. 72, pp.126501-1–126501-29, Oct. 2009.
[8] Peardon’s Handbook of Crystallograpphic Data, pp. 2795-2796.
[9] D. J. Leary, J. O. Barnes, and A. G. Jordan,“Calculation of Carrier Concentration in Polycrystalline Films as a Function of Surface Acceptor State Density: Application for ZnO Gas Sensors,＂J. Electrochem. Soc, Vol. 129, pp. 1382-1387, 1982.
[10] G. Neumann,“On the Defect Structure of Zinc-Doped Zinc Oxide,＂Phys. Status Solids(b), Vol. 105, pp. 605-612, 1981.
[11] H. Hosono, "Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application," J. Non-Cryst. Solids, Vol. 352, pp. 851–858, Jun. 2006.
[12] T. Kamiya, K. Nomura, and H. Hosono, “Origins of high mobility and low operation voltage of amorphous oxide TFTs: Electronic structure, electron transport, defects and doping,” J. Disp. Technol., Vol. 5, no. 7, pp. 273–288, Jul. 2009.
[13] K. Nomura, A. Takagi, T. Kamiya, H. Ohta, M. Hirano and H. Hosono, "Amorphous oxide semiconductors for high-performance flexible thin-film transistors," Jpn. J. Appl. Phys., Vol. 45, no. 5B, pp. 4303–4308, May 2006.
[14] Tze-Ching, Chiao-Shun Chuang, Kenji Nomura, Han-Ping David Shieh, Hideo Hosono, and Jerzy Kanicki, “Photofield-Effect in Amorphous In-Ga-Zn-O (a-IGZO) Thin-Film Transistors,” Journal of Information Display, Vol. 9, no. 4, December 2008.
[15] Minkyu Kim, Jong Han Jeong, Hun Jung Lee, Tae Kyung Ahn, Hyun Soo Shin, Jin-Seong Park, Jae Kyeong Jeong, Yeon-Gon Mo, and Hye Dong Kim, “High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper,” App. Phy. Lett. Vol. 90, p. 212114, 2007.
[16] Chiao-Shun Chuang, Tze-Ching Fung, Barry G. Mullins, Kenji Nomura, Toshio Kamiya, Han-Ping David Shieh, Hideo Hosono, and Jerzy Kanicki, “Photosensitivity of Amorphous IGZO TFTs for Active-Matrix Flat-Panel Displays,” SID 08 DIGEST, 1215.
[17] N. C. Su, S. J. Wang, and Albert Chin, “High-Performance InGaZnO Thin-Film Transistors Using HfLaO Gate Dielectric” IEEE Electron Device Letters, Vol. 30, No.12, pp. 1317-1319, Dec. 2009.
[18] Keun Woo Lee, Kon Yi Heo, Sang Hoon Oh, Abderrafia Moujoud, Gun Hee Kim, Hyun Jae Kim, “Thin film transistors by solution-based indium gallium zinc oxide/carbon nanotubes blend,” Thin Solid Films, Vol. 517, pp. 4011-4014, 2009.
[19] G. Neumann,“On the Defect Structure of Zinc-Doped Zinc Oxide,＂Phys. Status Solids(b), Vol. 105, pp. 605-612, 1981.
[20] B. Cheng, M. C. Cao, R. Rao, A. Inani, P. V. Voorde, W. M. Greene, J. M. Stork, M. Zeitzoff, and J. C. Woo, “The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs,” IEEE Trans. Electron Devices Vol. 46, pp. 1537-1544, 1999.
[21] V. Mikhelashvili, and G. Eisenstein, “Effects of annealing conditions on optical and electrical characteristics of titanium dioxide films deposited by electron beam evaporation,” Appl. Phys. Lett., Vol. 89, pp. 3256-3269, 2001.
[22] M. H. Cho, Y. S. Roh, C. N. Whang, K. Jeong, S. W. Nahm, D. H. Ko, J. H. Lee, N. I. Lee, and K. Fujihara, “Thermal stability and structural characteristics of HfO2 films on Si (100) grown by atomic-layer deposition,” Appl. Phys. Lett., Vol. 81, pp. 472-474, 2002.
[23] S. M. Hu, “Stress-related problems in silicon technology,” Appl. Phys. Lett., Vol. 706, pp. 53-80, 1991.
[24] T. M. Klein, D. Niu, W. S. Epling, W. Li, D. M. Maher, C. C. Hobbs, R. I. Hegde, I. J. R. Baumvol, and G. N. Parsons, “Evidence of aluminum silicate formation during chemical vapor deposition on amorphous Al2O3 thin films on Si (100),” Appl. Phys. Lett., Vol. 75, pp. 4001- 4003, 1999.
[25] H. F. Luan, S. J. Lee, S. C. Song, Y. L. Mao, Y. Senzaki, D. Roverts, and D. L. Kwong, “Effect of Interface Oxide Layer on HfO2 Gate Dielectrics,” IEDM Tech. Dig., Vol. 34, pp. 141-142, 1999.
[26] K. J. Hubbard, and D. G. Schlom, “Thermodynamic stability of binary oxides in contact with silicon,” J. Mater. Res., Vol. 11, pp. 2757-2776, 1996.
[27] 王志誠，“碳化鉿金屬閘極搭配高介電係數二氧化鉿電容與場效應電晶體之研製”，國立成功大學微電子工程研究所碩士論文，2008。
[28] Y. C. Yeo, “Metal gate technology for nanoscaletransistors-materials election and process integration issues,” Thin Solid Films, Vol. 34, pp. 462-463, 2004.
[29] F. Boeuf, H. S. P. Wong, J. A. Hutchby, T. Skotnicki, and T. J. King, “The end of CMOS Scaling,” IEEE circuits & devices magazine, Vol. 5, pp. 16-26, 2005.
[30] K. A. Ellis, and R. A. Buhrman, “Boron diffusion in silicon oxides and oxynitrides,” J. Electrochem. Soc. Vol. 145, pp. 2068-2069, 1998. [28] F. Boeuf, H. S. P. Wong, J. A. Hutchby, T. Skotnicki, and T. J. King, “The end of CMOS Scaling,” IEEE circuits & devices magazine, Vol. 5, pp. 16-26, 2005.
[31] B. E. Deal, “Standardized terminology for oxide charges associated with thermally oxidized silicon,” IEEE Trans. Electron Devices, pp. 27-28, 1980.
[32] D. K. Schroder, “Semiconductor material and device characterization,” 2nd edition, Wiley, New York, pp. 367-369, 1998.
[33] M. Zambuto, “Semiconductor Devices,” McGraw-Hill Book Company, Ch. 9, pp. 284-332.
[34] A. Goetzberger, E. Klausmann, and M. J. Schulz, “Interface states on semiconductor/insulator interface,” CRC Crict. Rev. Solid State Sci., 6, pp. 41-43, 1976.
[35] M. Koyama, Y. Kamimuta, T. Ino, A. Nishiyama, A. Kaneko, S. Inumiya, K. Eguchi, and M. Takayanagi, “Careful examination on the asymmetric VFB shift problem for poly-Si/HfSiON gate stack and its solution by the Hf concentration control in the dielectric near the poly-Si interface with small EOT expense,” IEDM Tech. Dig., pp. 499-502, 2004.
[36] H. Yamada, T. Shimizu, A. Kurokawa, and K. Ishii, “MOCVD of High-Dielectric-Constant Lanthanum Oxide Thin Films,” J. Electrochem. Soc., Vol. 150, pp. 429-435, 2003.
[37] N. Zhan, M. C. Poon, C. W. Kok, K. L. Ng, and H. Wong, “XPS study of the thermal instability of HfO2 prepared by RF sputtering in oxygen with RTA,” J. Electrochem. Soc., Vol. 150, pp. F200-F202, 2003.
[38] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 548-550.
[39] Donald A. Neamen, “Semiconductor Physics & Devices,” 3rd edition, McGraw-Hill Book Company, Ch. 11, pp. 529-530.
[40] Gun Hee Kim, Hyun Soo Shin, Byung Du Ahn, Kyung Ho Kim, Won Jun Park, and Hyun Jae Kim, “Formation Mechanism of Solution-Processed Nanocrystalline InGaZnO Thin Film as Active Channel Layer in Thin-Film Transistor,” Jour. Elec. Soc., Vol. 156, no. 1, pp. H7-H9, 2009.
[41] Arun Suresh, Patrick Wellenius, Anuj Dhawan, and John Muth, “Room temperature pulsed laser deposited indium gallium zinc oxide channel based transparent thin film transistors,” Appl. Phy. Lett., vol. 90, pp. 123512-1-123512-3, 2007.
[42] Wantae Lim, SeonHoo Kim, Yu-Lin Wang, J. W. Lee, D. P. Norton, S. J. Pearton, F. Ren, and I. I. Kravchenko, “High-Performance Indium Gallium Zinc Oxide Transparent Thin-Film Transistors Fabricated by Radio-Frequency Sputtering,” Jour. Elec. Soc., Vol. 155, no. 6, pp. H383-H385, 2008.
[43] Keun Woo Lee, Kon Yi Heo, Sang Hoon Oh, Abderrafia Moujoud, Gun Hee Kim, and Hyun jae Kim, “Thin film transistors by solution-based indium gallium zinc oxide/carbon nanotubes blend,” Thin Solid Films, Vol. 517, pp. 4011-4014, 2009.
[44] Santosh M. Bobade, Ji-Hoon Shin, Young-Je Cho, Jung-Sun You, and Duck-Kyun Choi, “Room temperature fabrication Oxide TFT with Y2O3 as a gate oxide and Mo contact,” Appl. Surf. Sci., Vol. 255, pp. 7831-7833, 2009.
[45] Li-ping Feng, Zheng-tang Liu, Ya-Ming Shen, “Compostiional, structural and electronic characteristics of HfO2 and HfSiO dielectrics prepared by radio frequency magnetron sputtering,” Vaccum, Vol. 83, pp. 902-905, 2009.