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研究生: 吳政杰
Wu, Cheng-Chieh
論文名稱: 以液相氧化法成長磷化銦鎵及砷化鎵氧化物為閘極絕緣層應用於磷化銦鎵/砷化銦鎵金氧半假晶高電子移動率電晶體
Using Liquid Phase Oxidized InGaP and GaAs as Gate Insulators for InGaP/InGaAs Metal-Oxide-Semiconductor Pseudomorphic High Electron Mobility Transistors Applications
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 61
中文關鍵詞: 液相氧化法砷化鎵磷化銦鎵金氧半高電子移動率電晶體
外文關鍵詞: liquid phase oxidation, GaAs, InGaP, MOS, pHEMT
相關次數: 點閱:111下載:2
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  • 本論文中為致力於利用液相氧化法成長於砷化鎵及磷化銦鎵上,作為閘極介電層並應用於磷化銦鎵/砷化銦鎵假晶高電子移動率電晶體之研究。相較於其他的氧化系統而言,液相氧化法是一種不需要額外電壓或能量輔助、簡易、低成本及低溫成長(30-70°C)的氧化法。
    本論文研製之高電子移動率電晶體其閘極面積為1×100 (μm2)。針對直流特性而言,相較於傳統高電子移動率電晶體,應用磷化銦鎵氧化層作為閘極介電層於金氧半高電子移動率電晶體上,當最大閘極操作偏壓為2V時,可得最大汲極飽和電流為126 mA/mm(提升50 %),最大轉導為118 mS/mm(提升32 %)。正向導通電壓為1.05V,逆向崩潰電壓可達-23.65 V,而傳統高電子移動率電晶體逆向崩潰電壓僅為-7.8V,於此偏壓下,閘極漏電流有效改善1640倍。
    應用砷化鎵氧化層作為閘極介電層於金氧半高電子移動率電晶體上,當最大閘極操作偏壓為2V時,可得最大汲極飽和電流為310 mA/mm(提升269 %),最大轉導可提升至186mS/mm (提升108 %),次臨限擺幅為106mV/decade(改善58%)。正向導通電壓為0.9V逆向崩潰電壓可達-29.3 V,閘極漏電流於閘極偏壓-7.8V時,有效改善781倍。
    此外,元件閘極下方表面粗糙度將直接對元件的直流以及高頻的特性產生影響。針對直流特性而言,越粗糙的表面,將造成崩潰電壓下降,閘極漏電流上升,進而影響整個直流特性。針對高頻特性而言,越粗糙的表面,將造成閘極電阻增加。此外,閘極漏電流上升,將造成雜訊的增加。這些效應將於內文討論。
    針對高頻特性而言,相較傳統假晶高電子移動率電晶體,砷化鎵氧化層金氧半高電子移動率電晶體,其截止頻率為45.7 GHz(提升27 %),最大震盪頻率為20.3 GHz(提升81 %),對於雜訊而言,金氧半假晶高電子移動率電晶體也有較好特性。

    We demonstrate the use of native GaAs and InGaP oxides as gate insulators in the fabrication of InGaP/InGaAs pseudomorphic high electron mobility transistors (pHEMTs) that are characterized through the liquid phase oxidation (LPO) method. The liquid phase oxidation system is simple, low-cost, and near temperature (30-70℃); it also does not require the use of extra energy to form a native oxide layer in comparison with the other oxidation systems.
    In this work, the high electron mobility transistors are fabricated with gate geometry 1×100 (μm)2. Compared with the conventional pHEMTs, InGaP oxide is used as the gate insulator for MOS-pHEMT applications in the DC measurements. The maximum drain current density is found to be 126 mA/mm at the gate-to-source voltage of 2 V, representing an improvement of about 50%. Meanwhile, the extrinsic transconductance is 118 mS/mm, representing an improvement of about 32%. The maximum turn-on voltage is 1.05 V, and the breakdown voltage is -23.65 V. The gate leakage current density can be improved about 1640 times at VGD=-7.8V.
    GaAs oxide is used as the gate insulator for MOS-pHEMT applications. The maximum drain current density is at 310 mA/mm at the gate-to-source voltage of 2 V; this represents an improvement of about 269%. The extrinsic transconductance is 186 mS/mm, which represents an improvement of about 108%. The sub-threshold swing is 106 mV/decade, which improved by about 58%. The maximum turn-on voltage is 0.9 V, and the breakdown voltage is -29.3 V. The gate leakage current density can be improved by about 781 times at VGD=-7.8V.
    The surface roughness of the gate interface influenced the DC and microwave performances. In the DC performances, the rougher surface caused a decrease in breakdown voltage and an increase in leakage current. Meanwhile, in the microwave performances, the rougher surface caused an increase in gate resistance.
    The cut-off frequencies and the maximum oscillation frequencies of MOS-pHEMTs with GaAs oxide are 45.73 and 20.26 GHz, indicating an improvement of about 27% and 81%, respectively.

    第一章 序論1 1.1 研究背景與動機1 1.2 章節概要3 第二章 針對液相氧化法成長於磷化銦鎵之實驗步驟及特性分析5 2.1 液相氧化法實驗步驟5 2.2 氧化速率及液相氧化法氧化層薄膜折射率6 2.3 氧化機制7 2.4 原子力顯微鏡物理特性7 第三章 應用液相氧化法於磷化銦鎵/砷化銦鎵假晶高電子遷移率電晶體實驗流程15 3.1 磷化銦鎵/砷化銦鎵假晶高電子遷移率電晶體結構15 3.2 磷化銦鎵/砷化銦鎵假晶高電子遷移率電晶體元件16 第四章 應用液相氧化法為閘極介電層於磷化銦鎵/砷化銦鎵假晶高電子遷移率電晶體之特性27 4.1 直流特性量測與分析28 4.1.1 飽和汲極電流(Saturation drain current)28 4.1.2 轉移電導(Transconductance) 29 4.1.3 崩潰電壓(Breakdown voltage)30 4.1.4 閘極漏電流(Gate leakage current)32 4.1.5 次臨限擺幅(Subthreshold swing)33 4.2 低頻及高頻特性量測與分析33 4.2.1 截止頻率(Cutoff frequency)及最大震盪頻率(Maximum oscillation frequency)34 4.2.2 雜訊指數(Noise figure)35 4.2.3 低頻雜訊(Low frequency noise)36 第五章 結論與未來方向55 參考文獻56 表目錄 表4 - 1 不同氧化層厚度下直流特性比較 53 表4 - 2 不同氧化層厚度下崩潰電壓特性比較53 表4 - 3 不同氧化層厚度下高頻特性比較 54 表4 - 4 小訊號參數比較54 圖目錄 第一章 圖1 - 1 章節概要流程圖4 第二章 圖2 - 1 液相氧化法系統9 圖2 - 2 液相氧化法實驗流程圖10 圖2 - 3 準備及氧化磷化銦鎵圖11 圖2 - 4 磷化銦鎵層蝕刻後之原子力顯微鏡2D及3D圖12 圖2 - 5 磷化銦鎵層氧化15分鐘之原子力顯微鏡2D及3D圖12 圖2 - 6 磷化銦鎵層氧化30分鐘之原子力顯微鏡2D及3D圖13 圖2 - 7 磷化銦鎵層氧化45分鐘之原子力顯微鏡2D及3D圖13 圖2 - 8 原子力顯微鏡表面粗糙度趨勢圖 14 第三章 圖3 - 1 金氧半假晶高電子遷移率電晶體結構圖20 圖3 - 2 傳統假晶高電子遷移率電晶體結構圖20 圖3 - 3 磷化銦鎵/砷化銦鎵假晶高電子遷移率電晶體結構圖21 圖3 - 4 閘極金屬與通道層分離圖22 圖3 - 5 元件製作流程圖(a) 定義元件隔離區域 (b) 元件隔離 (c) 去除光阻 (d) 定義源極-汲極區域23 圖3 - 6 (e) 沉積源極-汲極金屬 (f) 掀離源極-汲極金屬 (g) 快速熱退火 (h) 閘極凹槽24 圖3 - 7 (i) 液相氧化法成長氧化層 (j) 定義閘極區域 (k) 沉積閘極金屬 (l) 掀離閘極金屬25 圖3 - 8 元件尺寸掃描式顯微鏡圖26 第四章 圖4 - 1 傳統高電子遷移率電晶體I-V曲線圖39 圖4 - 2 6nm磷化銦鎵氧化層高電子遷移率電晶體I-V曲線圖39 圖4 - 3 14nm砷化鎵氧化層高電子遷移率電晶體I-V曲線圖40 圖4 - 4 26 nm砷化鎵氧化層高電子遷移率電晶體I-V曲線圖40 圖4 - 5 傳統高電子遷移率電晶體轉移電導對應閘極偏壓圖41 圖4 - 6 6nm磷化銦鎵氧化層金氧半高電子遷移率電晶體轉移電導對應閘極偏壓圖41 圖4 - 7 14nm砷化鎵氧化層金氧半高電子遷移率電晶體轉移電導對應閘極偏壓圖42 圖4 - 8 26nm砷化鎵氧化層金氧半高電子遷移率電晶體轉移電導對應閘極偏壓圖42 圖4 - 9 正向導通電壓比較圖43 圖4 - 10 逆向崩潰電壓比較圖43 圖4 - 11 閘極漏電流比較圖44 圖4 - 12 氨水蝕刻之原子力顯微鏡2D及3D圖45 圖4 - 13 氨水蝕刻氧化40分鐘之原子力顯微鏡2D及3D圖45 圖4 - 14 磷酸蝕刻之原子力顯微鏡2D及3D圖46 圖4 - 15 磷酸蝕刻氧化40分鐘之原子力顯微鏡2D及3D圖46 圖4 - 16 傳統高電子遷移率電晶體次臨限電流47 圖4 - 17 6nm磷化銦鎵氧化層金氧半高電子遷移率電晶體次臨限電流47 圖4 - 18 26nm砷化鎵氧化層金氧半高電子遷移率電晶體次臨限電流48 圖4 - 19 傳統高電子遷移率電晶體截止頻率及最大震盪頻率49 圖4 - 20 6nm磷化銦鎵氧化層金氧半高電子遷移率電晶體截止頻率及最大震盪頻率49 圖4 - 21 14nm砷化鎵氧化層金氧半高電子遷移率電晶體截止頻率及最大震盪頻率50 圖4 - 22 最小雜訊指數比較圖51 圖4 - 23磷化銦鎵氧化層之金氧半假晶高電子遷移率電晶體低頻雜訊比較52 圖4 - 24 砷化鎵氧化層之金氧半假晶高電子遷移率電晶體低頻雜訊比較52

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