隨著互補式金屬-氧化物-半導體場效電晶體(complementary metal-oxide- semiconductor，簡稱CMOS)元件的閘極寬度收縮至65 nm以下，為了增進元件的特性及降低短通道效應，傳統的二氧化矽閘極氧化層的厚度必須降低至20 以下。然而過薄的二氧化矽將會由於電子電洞穿隧電流的增加，而引發高的漏電流，因而增加能量的消耗以及影響電路的運作。此外，傳統的P型多晶矽閘極電極也隨著尺寸的降低而面臨空乏效應以及硼穿透的現象，因而降低了整體電容值以及氧化層的可靠度。為了克服超薄氧化層及多晶矽閘極帶來的問題，必須使用高介電常數材料及新的閘極材料來延續縮小元件尺寸的趨勢。
為了克服傳統的多晶矽閘極電極帶來的問題，金屬氮化物成為取代多晶矽閘極電極材料的新選擇。然而以金屬氮化物作為閘極電極，閘極中氮的含量以及結晶結構卻沒有詳細的研究資料。因此，本研究第一階段以不同氮含量的氮化鎢作為閘極電極，而以二氧化矽(SiO2)作為閘極氧化層，研究氮含量對於氮化鎢作為閘極電極的影響。
藉由反應性磁控濺鍍，可以得到WN0.6、WN0.8和WN1.5三種不同含氮量的氮化鎢閘極電極，且其功函數分別為4.50、5.01和4.49 eV。經過500 oC的混合氣體(H2＋N2)退火後，WN0.6閘極表面的化學鍵結僅存W-O鍵，而無W-N鍵；此外，氧由SiO2層擴散進入WN0.6閘極，因而在WN0.6閘極與SiO2層之間形成一層混合層，此結果造成電容器的平帶電壓往正偏壓方向偏移。對於高氮含量的WN0.8和WN1.5閘極電極而言，退火後均有良好的表面抗氧化性以及閘極與介電層沒有明顯的反應發生。然而，在電容器的漏電行為表現上，閘極材料中氮含量的多寡對於介電層的漏電並沒有明顯的影響。
經由第一階段實驗得知WN0.8薄膜具備了良好的閘極電極熱穩定性與低電阻值，因此本研究第二階段使用WN0.8與結晶的五氧化二鉭(Ta2O5)，分別作為閘極電極與高介電常數閘極氧化層材料。藉由利用不同退火氣氛(H2與H2＋N2)及退火溫度(400-600 oC)，觀察WN0.8閘極的熱穩定性質以及其與Ta2O5氧化層界面的變化。結果顯示不論在何種退火氣氛下，WN0.8閘極的表面在經過600 oC退火後均會產生氧化的現象，主因為WN0.8薄膜中的氮原子發生向外逸散的現象。若採用H2＋N2退火氣氛則可有效降低WN0.8薄膜中氮原子逸散的程度。此外，WN0.8閘極與Ta2O5氧化層在600 oC退火處理後仍能維持良好的界面穩定性。在電性行為表現上，退火溫度的提升可以降低氧化層與基材界面的捕獲電荷數與降低氧化層漏電流之值。
為了更進一步降低閘極的電阻率，本研究的第三階段採用W(50 nm)/WN0.8(5-15 nm)疊層閘極電極結構，藉由改變WN0.8的厚度觀察電容器的特性。研究結果顯示，過薄的WN0.8(≤ 10 nm)電極會因為結晶性的降低因而導致功函數值的下降。經過混合氣體(H2＋N2)的熱處理後，W/WN0.8(15 nm)與單層WN0.8電極之功函數值均有降低的現象產生，然而W/WN0.8(≤ 10 nm)電極的功函數值則呈現增加的趨勢。此外，WN0.8的厚度變化並不會影響氧化層的缺陷數量，且經過熱處理後可有效降低氧化層的缺陷數目。

With the continuous down-scaling of complementary metal oxide semiconductor (CMOS) device dimensions to the 65 nm regime, the vertical dimension of SiO2 is also being scaled down to less than 20 in order to obtain the high device performance and to suppress short channel effects. In the regime of SiO2 thickness, however, the large gate leakage current due to electron and hole tunneling will increase static power consumption and affect circuit operation. The conventional p+ poly-silicon gate also suffers poly-depletion and boron penetration effects with decreasing dimensions, and those effects will decrease the capacitance and oxide layer reliability. Therefore, high dielectric constant (high-k) materials with thicker physical thickness and new gate electrode materials must replace SiO2 and poly-silicon, respectively, to overcome the obstacles associated with the small device dimension.
Metal nitrides are potential materials for gate electrode application. Nevertheless, nitrogen concentration and structure of metal nitride gate electrodes are not fully explored in previous studies. In the first part of this study, WNx and SiO2 are chosen as the gate electrode and gate dielectric, respectively, to investigate the effect of nitrogen content on the properties of WNx gate electrode.
Thin films of various nitrogen compositions, WN0.6, WN0.8 and WN1.5, are obtained by reactive sputtering. The work function of WN0.6, WN0.8 and WN1.5 are 4.50, 5.01 and 4.49 eV, respectively. After annealing at 500oC in H2＋N2 ambient, the surface of the WN0.6 film reveals only the W-O bonding, but no W-N bonding. In addition, oxygen diffused from SiO2 into WN0.6 and leads to the formation of a mixing layer. Subsequently, flatband voltage of the WN0.6-gated MOS capacitor shifts positively after annealing at 500oC. After annealing at 500oC, WN0.8 and WN1.5 films exhibit better resistance to oxidation than the WN0.6 film, regardless of the surface of the WNx film or the interface between WNx and SiO2. However, neither the nitrogen content in the WNx nor the post-metal annealing affects the leakage current of WNx/SiO2/Si capacitors at both positive and negative biases.
Thermal stability and electrical properties of WN0.8/Ta2O5/Si MOS capacitors upon post-metal annealing in H2 or H2+N2 ambient are investigated. The crystal structure of WN0.8 is W2N phase, and W2N partly transforms to WO3 after annealing at 600oC both in H2 and H2+N2 atmospheres because of the effusion of nitrogen atoms. However, the H2+N2 ambient will significantly reduce the degree of oxidation because the nitrogen in the annealing ambient will prevent the loss of nitrogen from the W2N layer. After annealing, the density of trapped charges decreased with increasing the annealing temperature. From the I-V curves, the leakage current decreases with increasing the annealing temperature at positive bias.
The resistivity of gate electrode can be reduced by employing W/WN0.8 stacking structure. The work function of the W/WN0.8(≤ 10nm) stack (~ 4.6 eV) is smaller than that of W/WN0.8(15nm) stack (~ 5.0 eV). It is attributed to the low crystallinity of thinner WN0.8 layer. After annealing in H2+N2 ambient, the work function of W/WN0.8(15nm) stack and W2N single layer decrease. But for the W/WN0.8(≤ 10nm) stack, the work function increases after annealing. In addition, the oxide charges decrease significantly after annealing and the amount of oxide charges is independent of the W2N thickness.

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