電子封裝技術隨著科技快速發展，微電子產品越輕薄越會有翹曲現象，電子封裝是由多種元件組合而成，在製造過程當中，因內部結構材料的系數差異，而會有封裝翹曲變形問題，也會導致下一站之蓋印、植球與切割站製程會因翹曲平面度問題，而造成機台送料不順以及膠體與基板界面產生剝離，使產品不良率增加，尤其BGA最為明顯。

本論文主要是探討BGA構裝元件於熟化後之翹曲行為；運用實驗設計，對BGA翹曲進行數據蒐集，再藉由有限元素法模擬熟化後之翹曲，來加以驗證翹曲是否一致，並從熟化後模擬分析找出環氧樹脂(Epoxy Mold Compound, EMC)與BT(Bismaleimide Triazine)基板的最佳化材料係數組合。

結果顯示隨著EMC與BT基板材料係數在不同溫度下之變化，會產生翹曲變形。熟化後隨著熱膨脹係數（Coefficient of thermal expansion, CTE）差異，受熱程度越久，其翹曲會越大，因此需要使用壓條治具來限制翹曲以降低翹曲量；隨著不同溫度會有不同熱膨脹係數，EMC與BT材料之動態機械分析(Dynamic Mechanical Analysis, DMA)相關材料參數必須導入有限元素法中，才能有效達到模擬與實驗之準確性。

With the rapid development of technology, electronic packaging technology is moving toward thinner products which have a bigger possibility of warpage. The main reason for warpage is due to various material interfaces in the electronic package. In the manufacturing process, the mismatch of the material properties tends to cause warpage deformation due to thermal stresses and strains, especially with temperature variations. Warpage issue is getting more and more focused, especially for BGA packages.

This thesis analyzes the warpage behavior of BGA packages after the processes of mold and post mold cure, respectively. After collecting the warpage data, the finite element method of ANSYS was utilized to simulate warpage phenomenon which was verified by the measured warpage data after post mold cure. In addition, the optimum material composition of EMC and BT was also determined by simulation.

The results show that the material property changes of EMC and BT substrate under different temperature will cause warpage. Furthermore, with the difference in thermal expansion coefficient after the post mold curing process, the higher the heat is, the bigger warpage the device will suffer. Therefore, pressurized jig is needed to reduce the warpage. As thermal expansion coefficient will differ under different temperature, related dynamic mechanical analysis (DMA) material coefficient of EMC and BT substrate material are crucial for the accuracy of the simulation results.

[1] D. G. Yang, K. M. B. Jansen, L. J. Ernst, G. Q. Zhang, W. D. van Driel, H. J. L. Bressers, X. J. Fan, “Prediction of Process-Induced Warpage of IC Packages Encapsulated with Thermosetting Polymers” ,Proceeding of Electronic Components and Technology Conference, pp.98-105,New York,2004.
[2] J. E. Luan, “Integrated Methodology for Warpage Prediction of IC Packages” ,Proceedings of the 31st International Conference on International Electronic Manufacturing and Technology, pp. 143-149, Malaysia ,2006.
[3] N. Srikanth, “Warpage Analysis of Epoxy Packages Using Viscoelastic Based Model” ,Journal of Materials Science, Vol. 41, pp. 3773-3780, 2006.
[4] Y. K. Kim, R. Peak, and D. Zwemer, “Warpage Prediction of Ball Grid Array Packaging＂,Proceedings of the 2007 ASME International Mechanical Engineering Congress and Exposition IMECE2007, pp. 257-261, Seattle, Washington, USA,2007.
[5]J. de Vreugd, K. M. B. Jansen, A. Xiao, L. J. Ernst, C. Bohm, A. Kessler, H. Preu, and M. Stecher, “Advanced Viscoelastic Material Model for Predicting Warpage of a QFN Panel” ,Proceedings of the 58th Electronic Components and Technology Conference, pp. 1635-1640, Lake Buena Vista, FL, USA, 2008.
[6] M. K. Saraswat, K. M. B. Jansen, M. D. Patel, L. J. Ernst, C. Bohm, A. Kessler,H. Preu, and M. Stecher, “A Characterization Method for Viscoelastic Bulk Modulus of Molding Compounds”, Proceedings of the 9th. International Conference on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE, pp. 1-4, Freiburg im Breisgau,Germany ,2008.
[7] Y. Komoto, “Warpage Mechanism of Single-Sided Molded Package Studied with Viscoelastic Analysis” ,Proceedings of the CPMT Symposium, Tokyo, Japan, pp. 1-4, 2010.
[8] Y. K. Kim, I. S. Park, and J. Choi, “Warpage Mechanism Analyses of Strip Panel Type PBGA Chip Packaging” ,Microelectronics Reliability, Vol. 50, pp. 398-406, 2010.
[9] MyoungSu Chae, Eric Ouyang, “Strip Warpage Analysis of a Flip Chip Package Considering the Mold Compound Processing Parameters”, Electronic Components & Technology Conference , pp. 441-448 , Las Vegas, NV, USA ,2013.
[10] Jianxia Haol, Jing Shangl, Xiaodong Liu', Tao Hangl , Liming Gaol, and Ming Lil” Impact of Substrate Materials on Packages Warpage”, 18th International Conference on Electronic Packaging Technology, IEEE, Harbin, China, pp.764-768, 2017.
[11] Nattha Sriwithoon, Kessararat Ugsornrat , Warayoot Srisuwitthanon , and Panakamon Thonglor, “Warpage of QFN Package in Post Mold Cure Process of integrated circuit packaging”, Siam Physics Congress 2017 (SPC2017) IOP Publishing,pp.1-6, 2017.
[12] Shu-Shen Yeh, Po-Yao Lin, Kuang-Chun Lee, Jin-Hua Wang, Wen-Yi Lin, Ming-Chih Yew, Po-Chen Lai, Chia-Kuei Hsu, Che-Chia Yang, Li-Ling Liao, Yu-Sheng Lin, Shin-Puu Jeng” Warpage Modeling and Characterization of the Cure-dependent Chemical Shrinkage and Viscoelastic Relaxation for Cured Molding Process” , 2018 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) ,IEEE, pp.130-134, Taipei, Taiwan, 2018.
[13] M. Y. Tsai and H. Y. Chang, ”Warpage Measurement and Simulation of Flip-Chip PBGA Package under Thermal Loading”, International Conference on Electronic Materials and Packaging,pp.145-148, Taipei, Taiwan, 2008.
[14] Qiming Chang, Jeffery C. C. Lo, S. W. Ricky Lee, Wei Xu3 , Weihua Yang3, “Characterization of Orthotropic CTE of BT Substrate for PBGA Warpage Evaluation”, 2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm),pp.1312-1340, Las Vegas, NV, USA ,2016
[15] J. H. Lau (ed.), thermal stress and strain in Microelectronics Packaging, Van Nostrand Reinhold, New York, 1993
[16] H. Lu, X. Zhang, and W. G. Knauss, “Uniaxial, shear and Poisson relaxation and their conversion to bulk relaxation,” Polymer Engineering and Science, Vol. 37, pp. 1053-1064, 1997.
[17] Y. S. Chang, “Study of isothermal and Isobaric Volume Shrinkage for Epoxy Molding Compound”, Ph.D. Thesis, Dep. Of Mechanical Engineering, National Cheng Kung University, Tainan, Taiwan, 2005.
[18] Rui Miranda Guedes, Jose Lopes Morais, “A Simple and Effective Scheme for Data Reduction of Stress Relaxation Incorporating Physical-Aging Effect: An Analytical and Numerical Analysis”, Polymer Testing 32, pp. 961-971, 2013.
[19]叢培倫，「IC封裝後熟化製程模擬之研究」國立成功大學機械工程學系碩士論文研究，2012。
[20]李博勝、楊閎鈞、屈子正，「材料特性及其量測方法對封裝翹曲模擬之影響分析與研究」日月光半導體製造股份有限公司委託技術開發計畫期末報告，2014。