本論文主要研究可直接電鍍銅之材料做為無種晶銅擴散阻障層(Seedless Cu diffusion barriers)之研究與探討。其分為二種研究方法，第一方法為改善可電鍍銅材料之釕阻障層，釕金屬已被證實可以不需銅種晶層直接電鍍銅，然而釕金屬薄膜為柱狀結構(Columnar microstructure)，提供許多垂直晶粒邊界(Grain boundaries)，會使銅原子大量、快速地擴散至介電層中，導致元件可靠度下降。
在此研究方法下，又細分為兩個改善方式，第一種方式為探討不同之磷摻雜至釕薄膜中，其對釕金屬之微結構(Microstructure)變化與銅擴散阻障特性改善探討，磷摻雜釕金屬是利用濺鍍釕金屬薄膜的同時，混合通入磷化氫(PH3)之氣體來摻磷原子至釕薄膜中。研究結果發現，磷摻雜可以讓釕金屬結構趨向為類非晶(amorphous-like)的結構，使其晶粒邊界大量下降，進而抑制銅的擴散。研究亦發現在高含量磷摻雜的釕金屬，可以提高釕金屬再結晶的溫度至400˚C，此方式也大大提升釕阻障層之熱穩定度達800˚C。
第二種方式為利不同含量之鉻摻雜至釕使其合金化，探討其銅阻障特性與薄膜之微結構變化，本研究是用利共濺鍍之方式來沈積釕鉻合金。鉻為耐火金屬(Refractory metal)，對銅會有相較低的擴散係數，本研究發現，在一定比例的鉻摻雜情況下，利用電子穿透顯微鏡與X光繞射分析都發現釕鉻合金薄膜具有非晶化的結構。鉻摻雜至釕中也提高了其再結晶之溫度達到700˚C，鉻摻雜至釕薄膜提供一個不錯的銅阻障效果，提高釕薄膜之熱穩定度達200˚C。
另一種研究方法為利用銅銦合金來做為銅種晶層，由於銦相較於銅與矽材料有較高的親氧特性，因此銅銦合金在製程退火中，銦會在銅銦合金層與介電材料層中，自我生成(self-forming)出一層緻密的氧化銦層，經由電子穿透顯微鏡之分析，其不論是在400oC或是500˚C的長時間退火，生成厚度都僅僅只有3nm。此一超薄氧化銦阻障層提供了一個絕佳的阻障特性，就算經過500˚C長達5小時的退火，利用X光光電子能譜儀(X-ray photoelectron spectroscopy,XPS)緃深分析觀察，發現還是可以有效的阻擋住銅的擴散。於多孔隙超低介電質材料上，經過高溫長時間退火，漏電流也沒有明顯的惡化，證明其確實有潛力可以先進銅製程上。
全球半導體技術藍圖(International Technology Roadmap for Semiconductors, ITRS)提出於2012年時，銅導線之阻障層厚度需低於2.6nm，本研究中，銅銦合金自我生成超薄阻障層的方法，其生成阻障層厚度僅只有3nm左右，是最為符合符合下一世代先進製程之銅阻障層厚度，再加上其優異的銅阻障特性，銅銦合金達到自我生成阻障層的方法，或許可以應用於下一世代的製程當中。不論如何，無種晶銅擴散阻障層提供了一種不須額外沉積傳統阻障層或是銅種晶層的方式，可以節省製程的步驟，達到製程步驟精減，已為目前積體電路工業界，下一世代主要研究之重點。

In this thesis, I used two approaches to investigate the performance of seedless Cu diffusion barriers. The first approach is self-forming In oxide as Cu diffusion barrier, the second one is adding impurities, such as P and Cr, into Ru barrier to improve barrier properties.
In the study of copper diffusion barrier properties of a 3 nm self-forming InOx layer on a porous ultra low-k (p-ULK), a 5 at.% In doped Cu film was directly deposited onto porous low-k films by co-sputtering, followed by annealing at various temperatures. Transmission electron microscopy (TEM) images showed that a 3 nm layer was self-formed at the interface between Cu-In and p-ULK films after annealing at 400˚C for 1 h. An EDS line scan on the region near this interface showed obvious accumulation of In at the interface. X-ray photoelectron spectroscopy (XPS) analyses indicated that the self-formed interfacial layer was InOx. The self-forming InOx layer also prevented Cu agglomeration on the p-ULK film surface. The XPS atomic depth profiles showed that the self-formed InOx barrier was thermally stable against Cu diffusion to at least 500˚C for 5 h. The sheet resistance of the post 500 oC annealed Cu-In film was comparable to that of a pure Cu film. The Cu-In self-forming barrier approach may be a viable candidate for Cu/p-ULK interconnects.
The thermal and electrical properties of physical vapor deposition (PVD) Ru(P) film deposited on p-ULK material as Cu diffusion barrier were also studied. The phosphorous concentration can be tuned by adjusting Ar to PH3 ratio of the sputtering gases. The leakage current depends on phosphorous concentration. Higher phosphorous content in Ru film has lower leakage current. No obvious phosphorous content dependence was observed when the amorphous Ru(P) film crystallized. The X-ray diffraction (XRD) graphs and energy dispersive spectrometer’s (EDS) atomic depth profiles show that the Ru(P) film deposited on p-ULK can effectively block Cu diffusion when the sample is subjected to 800˚C 5 min annealing. The phosphorous doped Ru film improves diffusion barrier properties and leakage current performance. The improved Ru(P) barrier is also capable of direct Cu plating and could be a potential candidate for advanced metallization.
In addition, a 5 nm-thick Cr added Ru film has been extensively investigated as a seedless Cu diffusion barrier. The 7.8 at.% Cr added Ru film has a glassy microstructure and is an amorphous-like film. The RuCr film is stable up to 750˚C, which is approximately a 200˚C improvement in thermal stability as compared to that of the pure Ru film. The leakage current of the Cu/5 nm RuCr/p-ULK/Si stacked structure is at least two orders of magnitude lower than that of a pristine Ru sample. The RuCr film can be a promising Cu diffusion barrier for advanced Cu metallization.

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[11] The International Technology Roadmap for Semiconductors, 2010 update

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