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研究生： 曹峻赫
Tsao, Chun-Ho
論文名稱： 碳六十修飾層對五環素薄膜結晶性之影響
Influence of C60 Modification Layer on Crystallinity of Pentacene Film
指導教授： 王永和
Wang, Yeong-Her
學位類別： 碩士
Master
系所名稱： 理學院 - 光電科學與工程研究所
Institute of Electro-Optical Science and Engineering
論文出版年： 2009
畢業學年度： 97
語文別： 英文
論文頁數： 75
中文關鍵詞： 通道電阻 、結晶性 、碳六十 、五環素 、有機薄膜電晶體
外文關鍵詞： organic thin film transistors, pentacene, C60, crystallinity, channel resistance
相關次數： 點閱：114  下載：2 
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    • 有機主動層薄膜成長控制為製作高效率有機薄膜電晶體的先決條件，有機薄膜結晶性的好壞對於薄膜載子移動率的影響甚鉅。在本論文中，將探討以碳六十做為修飾層對五環素有機薄膜電晶體主動層結晶性及薄膜結晶性對元件電特性的影響。我們發現在主動層中摻入一層碳六十修飾層可改善五環素有機薄膜的結晶性，由X光繞射儀分析發現主動層薄膜結晶性會因為碳六十修飾層厚度而改變。當碳六十修飾層厚度為3.5nm時會得到較佳的元件特性，和未經修飾的元件比較，載子移動率從0.29 cm2/Vs 提升至0.50 cm2/Vs，最大飽和電流從45.0μA提升至90.0μA，通道電阻也從2.4 MΩ降低至1.34MΩ。元件電特性提升是由於加入碳六十修飾層後使得五環素有機薄膜結晶性提升之緣故。

    Growth control of organic thin films is a prerequisite for the fabrication of high performance organic thin film transistors (OTFTs), since charge carrier mobility strongly depends on the organic film crystallinity.
    The influence of C60 modification layer on crystallinity and the transistor performance of pentacene-based active layer will be discussed, in this study the crystallinity of pentacene film can be improved by inserting C60 modification layer. It is found that the crystallinity of pentacene film is varied with C60 thickness. When inserting 3.5nm C60 modification layer, better device performance will be obtained, comparing the devices with and without the modification layer, the field effect mobility increased from 0.29 cm2/Vs to 0.50 cm2/Vs, the maximum saturation current also increased from 45.0μA to 90.0μA, while the channel resistance decreased from 2.4MΩ to 1.34 MΩ. The improvement of device performance is attributed to insert C60 modification layer in active layer, enhancing the crystallinity of pentacene film.

    Chapter 1 Introduction 1 1.1 Background and Development 1 1.2 Motivation 3 1.3 Organization 4 Chapter 2 Principle of OTFTs 5 2.1 Charge Transport in Organic Materials 5 2.1.1 Hopping 5 2.1.2 Intrachain 6 2.1.3 Interchain 6 2.1.4 Intergrain 6 2.1.5 Multiple Trapping and Release 7 2.2 Device Structure and Mode of Operation 8 2.2.1 Device Structure 8 2.2.2 Operation Principle 9 2.3 Important Parameters of OTFTs 11 2.3.1 Field Effect Mobility 11 2.3.3 Sub-Threshold Slope 12 2.3.4 On/Off Current Ratio 12 2.3.5 Contact Resistance and Channel Resistance 13 Chapter 3 Experimental Procedure 15 3.1 Fabrication Equipment 15 3.1.1 Experimental Equipment 15 3.1.2 Experimental Materials 15 3.2 Experiment Procedure 18 3.2.1 Pre-processing Cleaning 18 3.2.2 ITO Transparent Film as Gate Electrodes 18 3.2.3 PVP as an Insulator Layer 19 3.2.4 Deposited Active Layer 19 3.2.5 Gold (Au) as the Source and Drain Electrodes 20 Chapter 4 Result and Discussion 21 4.1 OTFTs with C60 Modification Layer Introduced in Different Position in Pentacene Film 21 4.1.1 Electrical Measurement 21 4.1.2 X-ray Diffraction (XRD) Measurement 23 4.1.3 Surface Roughness (AFM) Measurement 23 4.1.4 Contact Angle (Surface Energy) Measurement 24 4.1.5 Summary 24 4.2 Effect on Electrical Characteristics Investigated with Different C60 Modification Layer Thickness 25 4.2.1 Electrical Measurement 25 4.2.2 X-ray Diffraction (XRD) Measurement 26 4.2.3 Contact and Channel Resistance Measurement 27 4.2.4 Summary 27 Chapter 5 Conclusions and Future Work 28 5.1 Conclusions 28 5.2 Future Work 28 References: 29 Table 1.1 Comparisons between amorphous-Si, poly-Si, and OTFTs. 34 Table 3.1 The structure parameters of the pentacene-based OTFTs. 34 Table 4.1 Comparisons of the device performance with and without modification layer. 35 Table 4.2 Comparisons of the device performance. 35 Figure 1.1 Chemical structures of P3HT and BBL. 36 Figure 2.1 Intra molecular transport mechanism in organic thin film. 37 Figure 2.2 Inter molecular transport mechanism in organic thin film. 37 Figure 2.3 Top gate structure OTFTs. 38 Figure 2.4 Bottom gate structure OTFTs. 39 Figure 2.5(a) P-type OTFTs energy level diagram. 40 Figure 2.5(b) N-type OTFTs energy level diagram. 41 Figure 2.6 Basic device operation of top contact OTFTs. 42 Figure 3.1 The sputter system. 43 Figure 3.2 The thermal system. 43 Figure 3.3 Chemical structures of PVP, PMF and PGMEA. 44 Figure 3.4 Chemical structures of pentacene and fullerene. 45 Figure 3.5 The flow chart of ITO gate pattern formation. 46 Figure 3.6a Gate electrode pattern mask. 47 Figure 3.6b Active layer pattern mask. 47 Figure 3.6c Source and Drain electrodes pattern mask. 48 Figure 3.9 The flow chart of device formation 48 Figure 3.7a 2D AFM image (0nm C60). 49 Figure 3.7b 3D AFM image (0nm C60). 49 Figure 3.7c 2D AFM image (3.5nm C60). 50 Figure 3.7d 3D AFM image (3.5nm C60). 50 Figure 3.7e 2D AFM image (7.0nm C60). 51 Figure 3.7f 3D AFM image (7.0nm C60). 51 Figure 3.8a 2D AFM image (0nm C60 coated PVP). 52 Figure 3.8b 3D AFM image (0nm C60 coated PVP). 52 Figure 3.8c 2D AFM image (3.5nm C60 coated PVP). 53 Figure 3.8d 3D AFM image (3.5nm C60 coated PVP). 53 Figure 3.8e 2D AFM image (7.0nm C60 coated PVP). 54 Figure 3.8f 3D AFM image (7.0nm C60 coated PVP). 54 Figure 3.10 The photograph of the device and device structure. 55 Figure 4.1 Schematic structures of pentacene-based OTFTs inserted C60 modification layer in different position (a) No C60, (b) C60 on the top, (c) C60 in the middle, (d) C60 under the bottom. 56 Figure 4.2 Schematic structures of OTFTs inserted C60 modification layer. 56 Figure 4.3 ID-VDS characteristic of device without C60 layer. 57 Figure 4.4 ID-VDS characteristic of device with C60 layer (top). 57 Figure 4.5 ID-VDS characteristic of device with C60 layer (middle). 58 Figure 4.6 ID-VDS characteristic of device with C60 layer (bottom). 58 Figure 4.7 ID-VG characteristic of device without C60 layer. 59 Figure 4.8 ID-VG characteristic of device with C60 layer (top). 59 Figure 4.9 ID-VG characteristic of device with C60 layer (middle). 60 Figure 4.10 ID-VG characteristic of device with C60 layer (bottom). 60 Figure 4.11a XRD measurement of active layer film without C60. 61 Figure 4.11b XRD measurement, the C60 was deposited on the top of pentacene film. 61 Figure 4.11c XRD measurement, the C60 was deposited on the bottom of pentacene film. 62 Figure 4.11d XRD measurement, the C60 was deposited on the middle of pentacene film. 62 Figure 4.12a AFM image of 45nm pentacene on PVP 63 Figure 4.12b AFM image of 3.5nm C60 on PVP 63 Figure 4.13a water contact angle of 45nm pentacene on PVP 64 Figure 4.13b water contact angle of 3.5nm C60 on PVP 64 Figure 4.14a CH2I2 contact angle of 45nm pentacene on PVP 65 Figure 4.14b CH2I2 contact angle of 3.5nm C60 on PVP 65 Figure 4.15 ID-VDS characteristic of device without C60 layer. 66 Figure 4.16 ID-VDS characteristic of device with C60 layer 1.4nm. 66 Figure 4.17 ID-VDS characteristic of device with C60 layer 2.1nm. 67 Figure 4.18 ID-VDS characteristic of device with C60 layer 3.5nm. 67 Figure 4.19 ID-VDS characteristic of device with C60 layer 4.9nm. 68 Figure 4.20 ID-VDS characteristic of device with C60 layer 7.0nm. 68 Figure 4.21 ID-VG characteristic of device without C60 layer. 69 Figure 4.22 ID-VG characteristic of device with C60 layer 1.4nm. 69 Figure 4.23 ID-VG characteristic of device with C60 layer 2.1nm. 70 Figure 4.25 ID-VG characteristic of device with C60 layer 4.9nm. 71 Figure 4.26 ID-VG characteristic of device with C60 layer 7.0nm. 71 Figure 4.27 Field effect mobility of device varying with C60 thickness. 72 Figure 4.28 ID and VT of device varying with C60 thickness. 72 Figure 4.29 XRD analysis of different C60 thickness inserted in active layer. 73 Figure 4.30 XRD analysis of 35nm C60 deposited under the pentacene layer. 73 Figure 4.31 Total resistances versus channel length. 74 Figure 4.32 Channel resistances versus channel length. 74

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