本論文以TSMC 0.18 um 1P6M CMOS製程研製5.8GHz 高線性度低電壓混頻器，以及分別利用WIN和TransCOM 0.15μm InGaAs PHEMT製程研製新式倍頻器與微小化寬頻環型耦合器，還有以FR4基板實現2.4GHz雙面單層式3dB共平面波導耦合器。

首先，我們為了解決傳統吉爾伯特混頻器有三顆電晶體操作在飽和區的缺點，所以利用並聯ㄧ對LC Tank來阻隔直流路徑，降低偏壓的使用，以及利用Cross-Connect的架構來改善線性度( IIP3 )。由於LC Tank共振頻率偏移，最後量測到的轉換增益為-13dB，線性度IIP3為10.5dB，埠對埠之間的隔離度也在合理範圍。再來，我們利用輸入端採用馬遜巴倫電路設計單平衡式倍頻器，把二集體反向相接，利用相位相消的方式來抑制奇次諧波，由於利用馬遜巴倫取代傳統巴倫，可以大幅度的減少面積，最後在輸入頻率9GHz ~ 14.5GHz範圍內，輸入功率為13dBm，量測得到轉換損耗為-11.2±1dB，基頻抑制力有11±1dBc，而三倍頻抑制力有25±10dBc。接著，我們所設計微小化寬頻環型耦合器，是利用1/4λ藍吉耦合器及屏蔽式共平面波導(CPWG)作取代，使整體面積縮小且可延伸頻寬至整個Ka頻帶。最後，為了簡化傳統雙面耦合架構的90度耦合器在製作上的困難，因此利用共平面波導的方式，來製作雙面單層式3dB共平面波導耦合器，大大的減少花費及難度。

This thesis presents the implementation of high-linearity, low-voltage CMOS Mixer at 5.8 GHz in TSMC standard 0.18um CMOS process. A novel frequency doubler and a miniaturized broadband hybrid ring by using WIN and Transcom InGaAs PHEMT process, respectively, have been demonstrated. Final, a 3-dB quadrature coupler using broadside-coupled coplanar waveguides at 2.4 GHz in PCB is realized.

First, a parallel LC-tank structure is added into Gilbert mixer for low operation voltage purpose. In RF stage, a cross-connect configuration with four pMOSs to replace the traditional nMOSs connection is proposed not only to reduce the noise figure but also to increase linearity. It exhibits a conversion gain of -13dB, IIP3 of 10.5 dB. Second, we design the single balanced frequency doubler with input Marchand balun. Due to the anti-phase relationships of the diodes, the odd harmonics can be suppressed. Using Marchand balun to replace hybrid circuits can reduce die size. It exhibits a conversion gain of -11.2±1dB, fundamental suppression of 11±1dBc and three-order suppression of 25±10dBc from 9 GHz to 14.5 GHz at 13 dBm input power. Third, a novel construction hybrid ring used 1/4λ Lange coupler and CPWG for reducing size and extending bandwidth. Final, a single-layer 3-dB quadrature coupler using broadside- coupled coplanar waveguides has been designed and analyzed. The proposed method enabled the recently published couplers with a broadside-coupled structure to be easily designed on a single-layer printed circuit without using a multi-layer substrate and an external metallic box.

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