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研究生: 劉育呈
Liu, Yu-Cheng
論文名稱: 以優化Sawyer-Tower線路探討鐵電薄膜之負電容效應
Modified Sawyer-Tower Circuit for characterization of negative-capacitance effects of ferroelectric thin films
指導教授: 陳宜君
Chen, Yi-Chun
學位類別: 碩士
Master
系所名稱: 理學院 - 物理學系
Department of Physics
論文出版年: 2019
畢業學年度: 107
語文別: 中文
論文頁數: 66
中文關鍵詞: 鋯鈦酸鉛負電容效應優化Sawyer-Tower電路
外文關鍵詞: Pb[ZrxTi1-x]O₃, Negative capacitance effect, Modified Sawyer-Tower circuit
相關次數: 點閱:174下載:3
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  • 近年來在智慧型手機、物聯網 (Internet of things)相關應用的快速發展,低耗能型電子元件最俱備潛力。其中最具優勢的是負電容場效電晶體(Negative Capacitance FET, NC-FET),是現今已被証實能突破傳統以係基底的場效電晶體次臨界擺幅 (sub-threshold swing)的物理極限,使電晶體可在更小的偏壓之下運行。然而負電容效應只發生在鐵電薄膜極化翻轉的瞬態,而為了探討負電容效應,我們必須找出鐵電薄膜的鐵電行為。在本研究中,我們藉由優化Sawyer-Tower線路測量鋯鈦酸鉛 (Pb[ZrxTi1-x]O3, PZT)薄膜極化翻轉瞬間之電流變化與負電容效應,搭配Landau–Ginzburg–Devonshire (LGD)理論模型探討充電曲線、電滯曲線與位能圖,其中S形狀電滯曲線之斜率為負電容效應最重要的證明。考慮到外部線路可能貢獻的寄生電容以優化本實驗線路,以便我們更進一步在巨觀世界下研究薄膜的鐵電性與負電容效應。
    本研究透過首先以改變線路上外加串聯電阻探討電阻對於PZT薄膜的鐵電行為與負電容效應影響。接著將PZT薄膜結構做改變,在鐵電層與底電極間加入介電層 (SrTiO3, STO),比較介電層加入前後PZT薄膜的鐵電特性。最後以不同的介電層厚度來探討介電層厚度對於負電容效應之影響。

    Recently, the low energy-consuming electronic devices have become popular due to the rapid development of smart phones and Internet of Things. For example, negative capacitance FET (NC-FET) was investigated as a potential candidate thanks to its steeper subthreshold swing (< 60 mV/dec) compared to traditional Si-based FETs, allowing a lower threshold voltage during FET operation. However, the negative capacitance characteristic occurs only in the ferroelectric polarization switching transient. In order to characterize the negative capacitance properties, we must figure out the ferroelectric behaviors of negative-capacitance thin films. In this study, the modified Sawyer-Tower circuit is employed to measure transient current change of strain-modulated BiFeO₃ and Pb[ZrxTi1-x]O₃ thin films during polarization switching. We demonstrated the negative slope behavior in the outcome of ‘S’-shaped polarization-voltage characteristic, regarded as one of the most important evidences of negative capacitance effect by Landau–Ginzburg–Devonshire (LGD model). The circuit design is improved by considering capacitance to be loaded in the measured circuit. In this way, the accomplishment of direct measuring the ferroelectric behaviors and negative-capacitance effects of ferroelectric thin films renders huge benefits for developing further quantification analysis.

    目錄 I 摘要 II Abstract IV 致謝 XI 圖目錄 XII 表目錄 XIV 第一章 緒論 1 第二章 文獻回顧 4 2-1 多鐵材料簡介 4 2-2 鐵電性質 5 2-3電滯曲線 6 2-4 介電性質 8 2-5 負電容基本原理與量測 9 第三章 實驗原理與方法 17 3-1壓電力顯微鏡 (PFM) 17 3-2壓電係數 (piezoelectric coefficient, d33)量測方法 19 3-3 實驗架設 21 3-4 實驗原理 23 第四章 結果與討論 25 4-1 優化之Sawyer-Tower線路架設 26 4-2 PZT/LSMO/STO與PZT/STO/LSMO/STO鐵電特性 39 4-3 不同介電層厚度PZT/STO/LSMO/STO負電容效應分析 54 第五章 結論 64 參考文獻 65

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