隨著半導體工業以及製程技術的快速進步，在一個單一的晶片上能放置的電晶體數目愈來愈多。一般而言，一個晶片內能夠整合許多的子系統，我們稱之為單晶片系統(SoC)。單晶片系統可以結合許多應用，如：電腦系統、數位訊號處理與多媒體等。傳統單晶片系統，使用匯流排來負責內部通訊，但是，當單晶片系統變得愈來愈複雜時，晶片內的通訊將會成為影響晶片處理效率的主要原因之一。因此，有人提出一種所謂晶片網路(NoC)架構來解決單晶片系統內部的通訊問題。
本篇論文將討論NoC系統的相關設計議題、系統中交換器的設計與硬體實做。我們所採用的拓樸是一種改良版的蝴蝶樹，封包在交換器中採用蟲洞交換(wormhole switching)、虛擬通道(virtual channel)和管線化(pipeline)等方式進行傳送，進而達到快速資料傳送並降低資料傳輸延遲(latency)的目的。這個硬體架構，在TSMC 0.18 μm 製程下，可以到達 140 MHz 的運作速度。

As the advance of semiconductor industry and process technology, a couple of larger systems can be integrated on a single chip. System-on-a-chip (SoC) design provide integrated solutions to many applications such as computer systems, digital signal processing (DSP), and multimedia. One of the major challenges of designing a SoC chip is the communication between all the components in the chip. Most of the current communication in SoC is based on buses. Network on a Chip (NoC) is a new communication architecture which helps to meet the challenge of designing a complex SoC.
This thesis discusses the design issues of the NoC, and the design and implementation of a switch in NoC. By adopting the extended-butterfly fat tree as the network topology and the techniques of wormhole switching and virtual channel for packet transmission, our design can achieve faster data transfer and lower latency. In the simulation, our design can operate at 140 MHz properly with the TSMC 0.18μm technology.

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