由於常見的接收機種類各有不同的優缺點，為了解決外差式或是直接降頻式接收機的一些接收特性問題，所要求的壓控震盪器的規格也有所不同，在此篇論文中，我們將針對一些問題來做設計上考量。

在此篇論文中，三顆晶片的模擬結果藉由ADS(Advanced Design System)利用 TSMC 0.18μm RF CMOS process model來完成並採用TSMC 0.18μm CMOS 製程來製作出來，分別應用在2.4GHz、5GHz的外差式或直接降頻式接收機。我們將會針對低相位雜訊、I/Q mismatch、諧波壓抑等來做探討。

Because heterodyne and homodyne receiver has different advantages and disadvantages, the specification of wanted VCO is different to solve the problem of receiving performance. In this thesis, we will consider the performance of VCO for some problem.
In this thesis, three chips are simulated by Agilent ADS with TSMC 0.18μm RF CMOS process model and fabricated by TSMC 0.18μm CMOS technology, and these are applied in 2.4GHz、5GHz heterodyne and homodyne receiver. We will discuss low phase noise, I/Q mismatch and harmonic suppression.

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