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研究生: 巫明泓
Wu, Ming-Hung
論文名稱: 熱氧化銅薄膜作為電阻式記憶體之應用
Characterization of thermally oxidized copper oxide thin film for resistive memory application
指導教授: 陳貞夙
Chen, Jen-Sue
學位類別: 碩士
Master
系所名稱: 工學院 - 材料科學及工程學系
Department of Materials Science and Engineering
論文出版年: 2013
畢業學年度: 101
語文別: 中文
論文頁數: 129
中文關鍵詞: 橢圓偏光術銅氧化物電阻式記憶體
外文關鍵詞: Ellipsometry, Copper Oxide, Resistive Memory
相關次數: 點閱:104下載:2
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  • 電阻式記憶體具有高運作速度,高記憶穩定時間,低操作電壓,結構簡單易堆疊等特性,ITRS(國際半導體技術藍圖)亦將此類記憶體視為最具競爭性的記憶體之一。因其與現今的C-MOS製程具有高度的相容可能性,電阻式記憶體之運作原理係利用不同阻態影響導通電流大小而產生0與1之記憶差異性,一般來說電流導通之機制會與氧化物缺陷型態,以及電極與氧化物之界面特性密切相關。本研究選用銅氧化物做為元件主動層,企圖以熱氧化方式調變缺陷的分布情形,討論不同氧化溫度與上電極之改變對元件之影響。
    實驗分為兩部分,第一部分以約1000nm之濺鍍銅膜於4:1氮氧氣氛比下進行180℃或200℃之氧化。其中濺鍍銅膜使用矽基板並以約50nm Ta金屬作為附著層,以橢圓偏光儀測定銅基材與銅氧化物光學常數,進而設計出適當之光學模型,以有利熱氧化銅系統中氧化物厚度之評估與機制探討。第二部分將500nm厚之銅膜濺鍍於Pt/Ti/SiO2/Si 基材上,並於400℃, 300℃, 200℃進行熱氧化,溫度之差異性會顯現在氧化層厚度與缺陷分布,並以橢圓偏光儀對氧化物厚度進行評估。之後分別以Al, Cu, Pt作為上電極以製成電阻式記憶體。電性方面以半導體參數分析儀進行量測,材料分析主要以 XPS, TEM進行分析。
    經由橢圓偏光儀與高解析穿透式電子顯微鏡分析,本研究設定之光學模型可有效對低溫下產生之熱氧化銅進行厚度上之測定,整體上顯示出一擴散主導之氧化過程。
    在電阻式記憶體元件特性方面,實驗結果顯示Cu與Pt做為上電極之元件過於導通而不具備電阻轉換特性,推測欲作為元件主動層,適當的電極與氧化物界面係為必要因素。若以Al電極為上電極時,200℃熱氧化元件為一常見雙極性記憶體,而300℃與400℃熱氧化元件皆同時具備單極性與雙極性記憶體特性,屬於無極性記憶體,其中兩元件操作皆需要一正偏壓進行Initial reset之初始步驟才可進行後續阻態轉換操作,並具有電阻轉換臨界電壓(Vset)呈現非對稱性的無極性特性。
    以Al為上電極之200℃熱氧化元件阻態轉換主要依靠上電極界面氧化物中帶正電氧空缺與來自銅下電極的銅離子在Cu2O晶界的漂移,進而建構出導電路徑。300℃與400℃熱氧化元件的Initial Reset現象與熱氧化過程中銅離子於氧化物晶界擴散後所殘留的銅離子還原產生的初始銅導電路徑相關,Initial reset若改為施加一負偏壓,則無法使銅導電路徑中的銅離子化並經由電場漂移而使導電路徑斷路,導致元件持續導通無法運作,表示元件確實具備一特定極性。經由XPS分析發現在CuO氧化層中O1s訊號確實滿足CuO鍵結的峰值位置,但在Cu 2p3/2訊號結果卻偏向Cu+與Cu0的峰值位置,此分析結果進一步證實銅氧化物中存在初始銅原子導電路徑的假設。
    經過Initial reset 後的300℃熱氧化元件與400℃熱氧化元件,在給予正偏壓情況下,經由驅動上電極界面氧化物中帶正電氧空缺,可使得元件內的導電路徑重新連結而轉為低阻態,給予負偏壓情況下則是經由靠近下電極氧化物晶界中的銅原子離子化進行漂移,並於上電極附近還原,使元件的導電路徑再次連結而轉為低阻態。單極性與雙極性的差異性在於前者Reset依賴單純Joule heating作用而後者主要依賴帶電氧空缺或銅離子的漂移。
    300℃熱氧化元件與400℃熱氧化元件差異處在於前者具備較低的Vset,單極性的Vset不對稱性較為明顯,此現象與不同氧化物疊層型態相關。300℃熱氧化元件為CuO與Cu2O的複合疊層,而400℃熱氧化元件為單純CuO氧化層,並經由TEM確認CuO晶粒明顯偏向縱向的長形晶粒,其中400℃熱氧化元件中的CuO晶粒明顯更大,而Cu2O氧化物偏向尺寸較小的的細碎晶粒,此元件系統中晶界是重要的氧空缺與銅離子移動路徑,因此晶粒型態會對元件電性有顯著的影響。

    Resistive switching memory has the characteristic of high operation speed, high retention time, low operation voltage and simple MIM structure. Due to its high compatibility to contemporary CMOS process, ITRS has also considered this type memory to be one of the most competitive memories. The resistance value of the device can be controlled by applying a bias voltage; therefore, the low or high current can be recognized as “0” or “1” signal. Generally, the switching mechanism is strongly related to defect state in oxide and the electrode/oxide interface. Our research focuses on the switching behavior of thermally grown copper oxide. Since we use thermal oxidation to fabricate the copper oxide layer, the defect distribution is controllable by tuning the oxidation temperature. Finally, we will discusss the effect of different oxidation temperatures and electrode materials on the device performance.
    In the first part of experiment we oxidized 1000nm copper film in N2:O2=4:1 ambient by thermal oxidation. The copper film was prepared on Si substrate with a Ta adhesive layer by DC sputtering. We employed ellipsometer to estimate the optical constants of copper film and copper oxide, and design a proper optical model to simulate the thickness of thermally grown copper oxide.
    In the second part of experiment, we deposited 500nm Cu film on Pt/Ti/SiO2/Si substrate and oxidized the sample at 400℃, 300℃, 200℃ for 60min in N2:O2=4:1 ambient. The difference can be observed in oxide thickness, phase, and microstructure. Then we deposited Al, Cu, Pt to serve as RRAM device top electrodes. Device performance was meauured by Agilent 4156, and the main material characterization was done by XPS, and TEM.
    Via ellipsometry and TEM analyses, our optical model can be applied in the thickness estimation of low temperature oxidized copper oxide. And it shows a diffusion control process by observing the relation between thickness and oxidation time.
    Regarding to the RRAM device performance, the devices with Cu or Pt top electrode are too conductive and do not show any resistive switching property. We suggest a proper electrode/oxide interface is necessary to serve as RRAM switching layer. When it comes to the device with Al top electrode, the 200℃ oxidized device show a normal bipolar switching behavior. The switching property mainly depends on the oxygen vacancies from TE/Oxide interface and the copper ion drifting along Cu2O grain boundary from Cu bottom electrode. Both 300℃ and 400℃oxidized device show nonpolar behavior (bipolar & unipolar). An initial reset step with positive bias is indispensable for these two devices, and their resistive switching voltages under positive and negative biases show an asymmetrical behavior. The initial reset process can be related to the copper filament comprised of reduced copper ion. The source of these copper ions comes from the retained copper ions in the copper oxide grain boundary, which is the main path for copper ion diffusion in the thermal oxidation process. If we apply a negative bias for the initial reset, the devices resistance state will not change. It shows a specific polarity in these devices. From the XPS analysis, the O1s signal corresponds well with Cu2+ bonding state in CuO layer. However, the Cu 2p3/2 signal tends to Cu+ and Cu peak position. This result further comfirms the postulation that the retained copper ions in the oxidation process will form initial copper filament in copper oxide gain boundary later.
    Applying positive bias on 300℃ and 400℃ oxidized device just after the initial reset step, the oxygen vacancies from TE/Oxide interface can turn the device into LRS. And a negative bias can also do this via the drifting of ionized copper from bottom copper oxide grain boundary. We rely on the Reset mechanism to differentiate bipolar and unipolar switching. Unipolar reset step can be purely attributed to “Joule heating”, and its counterparts mainly depend on the drifting of defects and ions.
    The 300℃oxidized device posses lower operation voltage and more asymmetrical I-V curves in unipolar operation compared to 400℃ oxidized one. This can be related to different stacking type and morphology of oxide layer. The 300℃ oxidized device is composed of CuO and Cu2O, which is quite different from only CuO layer for 400℃ oxidized device. From the result of TEM images, the grain of CuO is column-like, and the CuO grain size in 400℃ oxidized device is relatively larger. In addition, the grain in Cu2O layer is nano-sized and random oriented. In our device system, grain boundary provides a convenient path for the drifting of copper ions and oxygen vacancies. It is not surprising that the morphology of oxide grain will have prominent effect on the devices performance.

    第 1 章 緒論 1 1-1研究背景 1 1-2研究目的 4 第 2 章 理論基礎暨文獻回顧 5 2-1銅氧化機制簡介 5 2-1.1基本銅氧化機制 5 2-2銅氧化物基本性質 8 2-3橢圓偏光儀簡介 11 2-3.1各種偏極光 11 2-3.2 基本原理 13 2-3.3 橢圓偏光儀於偵測銅氧化物厚度之應用 20 2-4銅氧化物做為電阻式記憶體主動層機制簡介 24 第 3 章 實驗方法與步驟 29 3-1實驗材料 29 3-1.1濺鍍靶材 29 3-1.2基材 29 3-1.3實驗使用氣氛 29 3-1.4藥品與耗材 29 3-2實驗設備 30 3-2.1薄膜濺鍍系統 30 3-2.2退火熱處理系統 31 3-3實驗流程 32 3-3.1基材清洗 32 3-3.2熱氧化試片製備 33 3-3.3電阻式記憶體元件製備 34 3-4分析儀器 35 第 4 章 實驗結果與討論 40 4-1銅薄膜氧化之材料分析 40 4-1.1熱氧化銅膜氧化GIAXRD結果 40 4-1.2熱氧化銅膜各溫度氧化SEM Top-view結果 42 4-1.3熱氧化銅膜表面粗糙度分析 44 4-1.4熱氧化銅膜橢圓偏光儀模擬結果 46 4-1.5熱氧化銅膜各溫度SEM Cross-section結果 49 4-1.6熱氧化銅膜高解析穿透式電子顯微鏡分析結果 51 4-2 熱氧化銅電阻式記憶體元件電性分析 54 4-2.1 Al(TE)/200℃oxidized Cu/Pt元件電性分析 56 4-2.2 Al(TE)/300℃oxidized Cu/Pt元件電性分析 68 4-2.3 Al(TE)/400℃oxidized Cu/Pt元件電性分析 87 4-2.4各溫度熱氧化之元件阻態持續性分析 105 4-2.5各元件導電機制討論 107 4-2.6元件變溫量測實驗 112 4-2.7各元件電性比較 114 4-2.8不同上電極材料對元件之影響 119 第 5 章 結論 123 第 6 章 參考文獻 125

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