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研究生: 陳俊年
Chen, Chun-Nien
論文名稱: 新式混成電路應用於寬頻微小化被動式微波 單/雙平衡混頻器與倍頻器之研製
Implementation of Broadband Miniaturized Passive Microwave Singly/Doubly Balanced Mixers and Doublers Using Novel Hybrid Circuits
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 理學院 - 光電科學與工程研究所
Institute of Electro-Optical Science and Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 149
中文關鍵詞: 混頻器CMOS非對稱寬面耦合PHEMT巴倫功率分配器星狀混頻器馬遜巴倫倍頻器慢波架構
外文關鍵詞: SBM, CMOS, asymmetrical broadside coupled-lines, PHEMT, balun, star mixer, power divider, Marchand balun, SBD, DBD, slow-wave structure
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  • 頻率轉換電路為無線通訊系統的關鍵零組件。本論文以頻率轉換電路的研製為主,分為四部分。第一部分以0.18um CMOS製程實現非對稱寬面耦合混成電路的單平衡混頻器,操作頻率58-68 GHz,轉換損耗19.5-23.4 dB,LO-to-RF隔離度25.3-34.3 dB,LO-to-IF隔離度20.6-21.6 dB,面積約0.18 mm2。第二部分提出以功率分配器與開/短路殘段走線組成的雙重巴倫,以0.25um PHEMT製程實現星狀混頻器,最佳操作頻率為27-36 GHz,轉換損耗6.3-13.6 dB,LO-to-RF隔離度15.3-21.4 dB,LO-to-IF隔離度26.1-34.2 dB,面積約0.81 mm2。第三部分以雙馬遜巴倫與馬遜巴倫組成精簡雙平衡混成電路,以0.15um PHEMT製程實現星狀混頻器,操作頻率16-38 GHz,轉換損耗6.2-15 dB,LO-to-RF隔離度22.2-35.8 dB,LO-to-IF隔離度19-32.1 dB,面積約0.53 mm2。第四部分以慢波架構實現縮小化馬遜巴倫,以0.25um PHEMT製程實現單/雙平衡倍頻器。單平衡倍頻器的輸出頻率25-44 GHz,轉換損耗9-14.3 dB,主頻抑制大於25 dB,面積約0.37 mm2;雙平衡倍頻器的輸出頻率26-39 GHz,轉換損耗10.4-14.6 dB,主頻抑制大於33.7 dB,面積約0.61 mm2。

    The frequency conversion circuit is an essential component of wireless communication systems. The implementation of broadband miniaturized frequency conversion circuits is the principal purpose of this thesis. First, a singly balanced mixer (SBM) with a hybrid of asymmetrical broadside coupled-lines is realized through a 0.18 um CMOS process. The measured conversion loss is 19.5-23.4 dB, the LO-to-RF isolation is 25.3-34.3 dB, and the LO-to-IF isolation is 20.6-21.6 dB at 58-68 GHz. The size of the SBM is only 0.18 mm2. Second, a novel dual balun composed of a power divider and open/short stubs is presented, which fabricates a star mixer through a 0.25 um PHEMT process. The measured conversion loss is 6.3 -13.6 dB, the LO-to-RF isolation is 15.3-21.4 dB, and the LO-to-IF isolation is 26.1-34 dB at 27-36 GHz. The chip size of the star mixer is 0.81 mm2. Third, a miniature doubly balanced hybrid composed of a dual Marchand balun and a Marchand balun is utilized to realize a star mixer within 0.53 mm2 of the core area through a 0.15 m PHEMT process. The measured conversion loss is 6.2-15 dB, the LO-to-RF isolation is 22.2-35.8 dB, and the LO-to-IF isolation is 19-32.1 dB at 16-38 GHz. Finally, the miniaturized Marchand balun that employs a slow-wave structure is presented. The structure fabricates a singly balanced doubler (SBD) and a doubly balanced doubler (DBD) through a 0.25 um PHEMT process. The size of the SBD is 0.37 mm2, the measured conversion loss is 9-14.3 dB, and the fundamental suppression is higher than 25 dB at 25-44 GHz. The size of the DBD is 0.61 mm2, the measured conversion loss is 10.4-14.6 dB, and the fundamental suppression is higher than 33.7 dB at 26- 39GHz.

    目錄 中文摘要 I Abstract II 誌謝 IV 目錄 VII 表目錄 X 圖目錄 XI 第一章 緒論 1 1.1研究背景 1 1.2章節概述 3 第二章 基本概念 4 2.1收發機的基本架構 4 2.2二極體頻率轉換原理 5 2.3混頻器基本參數 6 2.3.1轉換增益/損耗(Conversion gain/loss, CG/CL) 7 2.3.2隔離度(Isolation) 8 2.3.3 1dB增益壓縮點(1dB compression point, P1dB) 8 2.3.4三階截斷點(Third order intercept point, IP3) 9 2.4倍頻器基本參數 11 2.4.1轉換增益/損耗(Conversion gain/loss, CG/CL) 12 2.4.2主(基)頻抑制(Fundamental suppression) 12 第三章 寬面耦合混成電路應用於單平衡混頻器 13 3.1研究動機 13 3.2設計目的與原理 14 3.2.1 LO反相輸入單平衡混頻器 14 3.2.2開/短路殘段反相相移器 16 3.2.3電路架構 18 3.2.4設計流程 19 3.3電路模擬 20 3.4電路佈局 23 3.5電路量測 24 3.6討論 28 第四章 新式雙重巴倫電路應用於星狀混頻器 30 4.1研究動機 30 4.1.1雙重巴倫 30 4.1.2星狀混頻器 31 4.2設計目的與原理 32 4.2.1星狀混頻器原理 32 4.2.2新式雙重巴倫 34 4.2.2.a理論分析 34 4.2.2.b電路實做與模擬/量測結果 43 4.2.2.c改良新式巴倫電路之實做與模擬/量測結果 48 4.2.2.d新式雙重巴倫電路與Marchand dual balun的比較 52 4.2.3電路架構 53 4.2.4MMIC的設計流程 55 4.3電路模擬 56 4.4電路佈局 60 4.5電路量測 61 4.6討論 65 第五章 精簡型星狀混頻器 67 5.1研究動機 67 5.2設計目的與原理* 68 5.2.1雙平衡混成電路 68 5.2.1.a 理論分析 69 5.2.1.b討論 79 5.2.1.c驗證電路 83 5.2.2電路架構 88 5.2.3設計流程 89 5.3電路模擬 90 5.4電路佈局 94 5.5電路量測 95 5.6 討論 99 第六章 以微小化巴倫電路實現之單/雙平衡倍頻器 100 6.1研究動機 100 6.2設計目的與原理 101 6.2.1平衡式倍頻器 101 6.2.1.a輸出端差動(Output balun)架構的單平衡倍頻器 101 6.2.1.b雙平衡倍頻器 103 6.2.2微小化Marchand balun 104 6.2.2.a微小化微帶傳輸線 104 6.2.2.b微小化平行耦合微帶線 106 6.2.2.c電路實做與模擬/量測結果 109 6.2.3電路架構 113 6.2.4MMIC的設計流程 115 6.3電路佈局 116 6.4電路模擬與量測 118 6.4.1 以微小化巴倫電路實現之單平衡倍頻器 118 6.4.2以微小化巴倫電路實現之雙平衡倍頻器 120 6.6討論 123 第七章 結論 125 第八章 附錄 127 8.1對稱三埠網路的奇偶模分析 127 8.2 對稱五埠網路的奇偶模分析 130 8.3 對稱七埠網路的奇偶模分析 134 8.4 Marchand dual balun的電路實做與模擬/量測結果 141 參考文獻 145 作者簡介 149

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