本論文針對電磁相容之靜電放電耐受測試環境提出分析建議，此乃考量現今電子產品日益精密，但卻容易受到靜電干擾，因此務須審慎進行測試，而肇因於測試進行中之不同環境，其中包括洩放電阻接地位置、靜電電壓激發點、不同接地情形以及水平耦合板間的電容效應，均可能影響測試結果，故本文即基於測試環境之一致性，致力建構一套實際測試系統，並且詳以監控記錄水平耦合板電壓暨分別探討接地點及電壓激發點之變動，同時觀察水平耦合板電壓變化以及探討周邊儀器造成之電容效應，進而彙整評估靜電耐受測試與試驗環境之特性關係。兹由測試結果分析可知，本文所提方法確已含括測試環境布建時之整體考量，頗有助於降低測試過程之不確定度，預將有助於靜電測試相關產業參考施行。

This thesis is focused on the analysis and suggestion for the environment of electrostatic discharge immunity tests in electromagnetic compatibility. The study is motivated because modern electronic products becomes more sophisticated that are susceptible to electrostatic interferences, meanwhile manifesting the importance of electrostatic tests before marketing. Yet, it is found that different testing environments such as the grounding location of resistance, the electrostatic discharge excitation point, the grounding conditions, and the capacitance effects between horizontal coupling planes, may all affect the testing outcome. Therefore, by considering reaching the consistence of testing environment, the thesis is devoted to constructing a practical testing system, by which the voltage of horizontal coupling plane is closely monitored and the changes in the grounding points along with the discharge excitation points are well investigated. In the mean time, the voltage changes of horizontal coupling plane and the capacitance effect caused by the surrounding instruments are also prudently analyzed, through which the relations between electrostatic discharge immunity tests and environment characteristics are extensively collected and assessed. The assessment results gained from different test scenarios help validate the overall consideration contributed by this proposed testing system, thereby assisting in the reduction of uncertainty during the testing process and serving as beneficial references for electrostatic testing industry applications.

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