本論文中，我們將傳統手動之高頻量測機台更新為一套全自動化之高頻量測系統。與市面上之全自動化高頻量測系統相比，它有成本低、省時、但精確性卻無差異之優點。除此之外，我們也發表一些可佈局在切割道上之新型銲墊構造，而它們具有節省面積、並可同時監視晶粒內之元件特性之優點。有了此套全自動化之高頻量測系統及新型銲墊構造，許多矽基主動及被動高頻元件，包括高頻互補式金氧半電晶體、電感及傳輸線等，在本論文中有詳細之研究。
首先，我們在第二章先簡單說明高頻量測，包括散射矩陣、校準、及去嵌化。接著，我們再說明一般常見之手動高頻量測機台，包含康思德科技之12吋探針量測儀S-300、安捷倫科技之向量網路分析儀E8363B PNA、半導體參數分析儀4156C、以及控制軟體ICCAP等所組成。本章亦說明如何將此手動高頻量測機台昇級為全自動量測系統。除外，銲墊構造對於高頻量測之影響在本章也有所討論。
在第三章，我們先介紹一種在後段製程常見之問題，也就是線寬增大效應。然後，我們利用發展出來之全自動化高頻量測系統來探討電感及傳輸線之特性。在電感方面，我們偏重在尺寸、直流偏壓及溫度等效應對其之影響。對傳輸線而言，我們在其本身及其下面之防護層之尺寸對其之影響有深入之討論。
在第四章，我們亦利用此全自動化高頻量測系統來研究熱載子對45及55奈米之負金氧半電晶體直流及高頻參數之影響。我們發現，當元件縮至深次微米區時，閘汲極電容之減少-∆Cgd會比閘源極電容之增加+∆Cgs來得小，而此造成切入頻率fT不僅受互導gm影響，也與Cgs 及 Cgd有關。我們並發展了一套表面通道電阻模型來解釋此一現象。接下來，我們也討論熱載子對不同氧化層厚度之45奈米正金氧半電晶體直流及高頻參數之影響。當然，具有較薄氧化層厚度者會遭受較嚴重之熱載子效應。但不論何者，其切入頻率fT僅受互導gm影響，而與Cgs 及 Cgd無關。
另外，在第四章，我們第一次比較熱載子及FN穿隧加壓對有無矽鍺源汲極之40奈米之正金氧半電晶體之影響。形變正金氧半電晶體會比非形變元件有較差之熱載子及FN穿隧可靠性。但對兩者而言，熱載子加壓後之+Cgs  -Cgd，及FN穿隧加壓後之Cgs  Cgd 0，都造成切入頻率fT僅受互導gm影響，而與Cgs 及 Cgd無關。

In this dissertation, an automatic RF test system, updated from a manual RF bench tester, has been developed with the advantages of accuracy and time saving. Compared with the commercially automatic RF test systems, the developed system has lower cost with the same performances. In addition, we developed some novel pad structures. These novel pad structures can be laid on the scribe line with the same performances and the advantages of area-saving and effective monitoring of devices in chips. With the automatic RF test system and novel pad structures, many silicon-based active and passive RF devices, including RF CMOS, inductors and transmission lines were investigated.
We firstly illustrate the basic concept about the RF measurements, including the scattering matrix, calibrations and de-embeddings in chapter 2. We then introduce the common RF bench tester comprising of a Cascade S-300 12-inch probe station, Agilent E8363B PNA, Agilent 4156C dc source, and the control program ICCAP. How to update this RF bench tester to the automatic RF test system is described in this chapter. In addition, the effects of pad structures on RF measurements are discussed in this chapter.
Then, a common issue on the BEOL process, i.e., the wire-edge enlargement effect (WEE), which is very serious on the lower metal layer of the deep submicron technology, is introduced. Next, we investigate the RF performances of the inductors and the transmission lines using the developed automatic RF test system. For inductors, the effects of dimension, dc bias and temperature are emphasized with a simple proposed model in detail. For transmission lines, their dimensions and the under shielding lines are also studied with a proposed model in detail.
Moreover, the hot carrier effects on dc and RF parameters of 45-nm and 55-nm NMOSFETs are investigated and compared in detail by the developed automatic RF test system. We find, as devices scale down to the deep submicron region, after hot carrier stress, -∆Cgd is less than +∆Cgs, and results in the fT being dependent on gm, Cgs and Cgd. These new observations are explained comprehensively by the developed surface channel resistance model. Next, the effects of hot carriers on the dc and RF performances of PMOSFETs with various oxide thicknesses prepared by 45 nm CMOS technology were investigated by automatic RF measurements. The devices with a thinner oxide layer suffer more serious damage from hot carriers than those with a thicker oxide layer. The greatest degradation due to hot-carrier injection is shifted from the condition of Vgstr = Vdstr / 2 for peak Ig and Isub in long-channel devices to Vgstr = Vdstr in short-channel devices. The fT degradation is only dependent on the transconductance gm, regardless of the total gate capacitance Cgg (=Cgs+Cgd). Furthermore, both hot carrier and Fowler-Nordheim (FN) tunneling stresses on RF performances of 40-nm PMOSFETs with and without SiGe S/D are compared for the first time. The strained PMOSFET suffers higher degradations in both hot carrier and FN tunneling reliabilities than those of the non-strained device. For both structures, the degradations caused by HCS are more serious than that caused by FN tunneling stress. The results of +Cgs  -Cgd after HCS and Cgs  Cgd 0 after the FN tunneling stress imply that the degradation of fT depends only on that of gm regardless of the changes of Cgs and Cgd for both PMOSFETs with and without SiGe S/D.

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