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研究生: 楊為翔
Yang, Wei-Hsiang
論文名稱: 氧化鋅奈米線電晶體之製作與探討
Fabrication and study of ZnO nanowire transistors
指導教授: 洪昭南
Hong, Chau-Nan Franklin
學位類別: 碩士
Master
系所名稱: 工學院 - 化學工程學系
Department of Chemical Engineering
論文出版年: 2011
畢業學年度: 99
語文別: 中文
論文頁數: 110
中文關鍵詞: 氧化鋅奈米線電晶體
外文關鍵詞: ZnO, nanowire, transistor
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  • 本論文主要分為兩大部分:第一部份為水熱法製作側向成長氧化鋅奈米線電晶體。利用傳統微影製程作出電極圖形蒸鍍上銀當晶種層和金屬阻擋層後用水熱法層側向成長氧化鋅奈米線,探討銀晶種層厚度的影響和前驅物濃度對於電極上成長之奈米線密度的變化,亦使用負型光阻做為阻擋層以水熱法側向成長氧化鋅奈米線之後,藉此比較不同阻擋層對成長結果之影響。此外也以鋅薄膜作為晶種層,以及比較於鋅薄膜上披覆鈦阻擋層後之成長情形,隨後配合滾壓及熱壓的方式進行元件之製作。
    第二部份則為利用焦耳熱改善元件特性之討論。主要是根據同一個串聯電路中若施加一電壓則其電流都相同,又因功率等於電流平方乘以電阻,所以元件中電阻越大的地方其所被施加的功率也越大,功率越大則其所生成的熱也越多,利用其產生之焦耳熱來達到退火的目的,藉此改善元件之特性。在本研究中利用光微影技術製備鋁電極,再利用介電泳方式排列氧化鋅奈米線於電極上,隨後經熱壓處理以降低其接觸電阻,並於不同環境下(氮氣、空氣和epoxy封裝後)在汲極施加偏壓探討其影響,且利用焦耳熱處理的過程中並不會使元件的溫度明顯提升,因此此製程將可在可撓曲基板或塑膠等不耐高溫的基板上進行電晶體製作及特性改善。

    There are two main topics in this study. The first part is fabrication of lateral growth of ZnO nanowire transistors using hydrothermal method. First, conventional photolithography process is used to fabricate electrode patterns followed by deposition of silver seed layer and metal inactive layer by e-beam evaporation. Then, the lateral growth of ZnO nanowires is carried out by hydrothermal method. The effects of silver seed layer thickness and the concentration of precursor on the density change of nanowires is studied. The fabrication of electrodes using negative type photoresist as a protection layer was also made by hydrothermal method to grow lateral ZnO nanowires. Therefore, we can compare the effects of protection layer material on growth. In addition, the growth of nanowires is compared between a seed layer made of zinc thin film and a zinc thin film with coated Titanium on top as protection layer, where both methods were followed by roll pressing and hot pressing to fabricate devices.
    The second part is focuses on performance improvement using Joule heating. According to the fact that if we apply a voltage then the same current exists in anywhere in a circuit in series where the power is equal to current square multiple by the resistance, when the local resistance increases, the local power increases along with a higher the local power and more local heat; therefore, those heat is being utilized to achieve annealing. Then, we used photolithography technique to fabricate aluminum electrodes followed by aligning ZnO nanowires on Al electrodes by dielectrophoresis method. Improving the contact resistance was done by hot pressing method, and then voltage is applied under different atmosphere and environment (nitrogen, atmosphere, and epoxy protection) to study the effect of annealing. Since the increases in device temperature is not obvious during joule heat treatment, the proposed fabrication process can be used for transistor fabrication and characteristics improvement on non-temperature-tolerant flexible substrates such as plastic.

    中文摘要……………………………………………………………………I 英文摘要………………………………………………………………......II 致謝……………………………………………………………………….III 目錄……………………………………………………………………….IV 表目錄…………………………………………………………………..VIII 圖目錄……………………………………………………………………..X 第一章 緒論……………………………………………………………….1 1-1 前言……………………………………………………………………1 1-2研究動機……………………………………………………………….2 第二章 理論基礎與文獻回顧…………………………………………….4 2-1氧化鋅的結構特性與應用…………………………………………….4 2-2氧化鋅奈米線之成長方法與機制…………………………………….7 2-2-1氣-液-固(Vapor-Liquid-Solid,VLS)機制成長氧化鋅奈米線….8 2-2-2 MOCVD法成長氧化鋅奈米線………………………………...9 2-2-3水熱法成長氧化鋅奈米線…………………………………….10 2-3電晶體簡介…………………………………………………………...17 2-4 FET工作原理與理論計算…………………………………………...18 2-4-1兩端特性……………………………………………………….18 2-4-2三端特性……………………………………………………….19 2-4-3載子遷移率(Carrier Mobility)………………………………...20 2-4-4臨界電壓值(Threshold voltage,Vth)…………………………..21 2-4-5轉移電導值(Transconductance,gm)…………………………..22 2-4-6開關特性(On/off ratio)………………………………………...22 2-4-7次臨界擺幅(Substhreshold swing,S)………………………....22 2-5奈米線電晶體研究近況……………………………………………...24 2-5-1平面場效電晶體(Planar FETs)……………………………….25 2-5-2多層堆疊奈米線電晶體……………………………………….28 2-5-3核/殼(Core/shell)奈米線電晶體……………………………...29 2-5-4環繞式閘極(Surrounding-gate)奈米線電晶體……………….30 2-6側向成長氧化鋅奈米線陣列…………………………………………40 第三章 實驗方法與步驟………………………………………………...46 3-1實驗流程……………………………………………………………...46 3-2實驗設備……………………………………………………………...47 3-2-1光罩對準機(Mask aligner)……………………………………47 3-2-2電子束蒸鍍機(Electron-beam evaporation)…………………..48 3-2-3電漿濺鍍系統………………………………………………….49 3-2-4 壓印機………………………………………………………...50 3-2-5介電泳電源供應器…………………………………………….50 3-2-6 示波器(Oscilloscope)………………………………………...51 3-3實驗材料……………………………………………………………...51 3-3-1 基板材料……………………………………………………...51 3-3-2 有機材料……………………………………………………...51 3-3-2 無機材料……………………………………………………...52 3-3-3 金屬材料……………………………………………………...52 3-3-4 基板清洗溶劑及實驗氣體………………………...…………53 3-4實驗步驟……………………………………………………………...53 3-4-1水熱法製作側向成長氧化鋅奈米線電晶體………………….53 3-4-2利用焦耳熱改善元件特性…………………………………….55 3-5實驗鑑定……………………………………………………………...56 3-5-1掃描式電子顯微鏡(Scanning electron microscopy,SEM)…..56 3-5-2電性量測系統………………………………………………….57 第四章 結果與討論……………………………………………………...62 4-1水熱法製作側向成長氧化鋅奈米線電晶體………………………...62 4-1-1於不同材料之薄膜上成長氧化鋅奈米結構………………….62 4-1-2以鉻/銀/鈦電極之基板側向成長氧化鋅奈米線……………...64 4-1-2-1不同厚度之銀薄膜對側向成長氧化鋅奈米線之影響...64 4-1-2-2不同前驅物濃度對鉻/銀/鈦電極側向成長氧化鋅奈米線之影響…………………………………………………………...65 4-1-3光阻/銀/鈦電極之基板側向成長氧化鋅奈米線……………...66 4-1-4銀/鈦電極側向成長氧化鋅奈米線後以滾壓法處理…………68 4-1-5探討銀電極側向成長氧化鋅奈米線後電極間短路之問題….69 4-1-6使用鋅電極製作側向成長氧化鋅奈米線電晶體…………….71 4-1-6-1水熱法於鋅薄膜上成長氧化鋅奈米線………………...71 4-1-6-2鋅電極側向成長氧化鋅奈米線後以滾壓/熱壓法處理..72 4-1-6-3鈦/鋅電極側向成長氧化鋅奈米線後以滾壓/熱壓法處理………………………………………………………………...73 4-2利用焦耳熱改善元件特性…………………………………………...95 4-2-1通電退火對於元件特性的影響……………………………….95 4-2-2有無鈍化層對於通電退火後元件特性的影響……………….97 4-2-3不同溫度熱壓對於通電退火後元件特性的影響…………….98 4-2-4通電退火過程中不同氣氛對元件特性的影響……………….99 第五章 結論…………………………………………………………….105 參考文獻………………………………………………………………...107

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