| 研究生: |
康鈞誌 Kang, Chin-chih |
|---|---|
| 論文名稱: |
運用模式樹建構半導體測試時間之診斷模式 Using model tree to build up diagnostic model of semiconductor probing time |
| 指導教授: |
翁慈宗
Wong, Tzu-Tsung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
管理學院 - 工業與資訊管理學系碩士在職專班 Department of Industrial and Information Management (on the job class) |
| 論文出版年: | 2009 |
| 畢業學年度: | 97 |
| 語文別: | 中文 |
| 論文頁數: | 41 |
| 中文關鍵詞: | 數值預測 、模式樹 、線性迴歸式 |
| 外文關鍵詞: | linear regression model, numeric prediction, model tree |
| 相關次數: | 點閱:110 下載:5 |
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身處在一個資訊快速流通的時代,如何能夠將資料轉化成為有用的資訊成為一個重要的課題。資料探勘中的模式樹(model tree)運用了線性迴歸模式(linear regression model)建構成樹狀結構,能夠清楚呈現資料之間關係以及所包含的資訊。本研究的資料來自於晶圓測試廠的人工料機與測試結果的資料,其中包含了數值屬性與名目屬性,然而模式樹所處理的資料必須是數值屬性,M5’具備處理此兩類資料的特性,本研究採取此方法用以建構模式樹;在建構模式樹之前必須先對資料進行前置處理,包括了資料整合、資料清理與轉換及資料正規化,將前置處理過後的資料根據測試時間分割成為正常與異常兩資料區塊,接著運用M5’建立兩區塊的模式樹,分別比較兩模式樹之的內部節點(internal node)與葉部節點(leaf node)之間的差異,從兩者差異中分析以獲取造成測試時間差異的資訊,提供相關人員對造成時間差異點進行處理。
Living in the age that information flows so fast. How to convert data into useful information becomes an important issue. Model trees have a tree structure with leaves containing linear regression models. They could reveal the relationship between attributes and the information embedded in data. The data gather in wafer testing factory contain attributes about operators, machines, material, and processes. An attribute type can be either numeric or nominal. Model tree is originally designed for processing numeric attributes. M5’ could deal with both attribute types, hence this study adopts this tool for building model trees. Before building a model tree, the preprocess of data includes data integration, data clearance, data transformation, and data normalization. Then data will be divided into normal and abnormal groups based on their wafer testing times. The model trees built for the two data groups are compared to distinguish their differences in internal nodes and leaf nodes. The attributes that are critical for increasing the test time of a wafer are extracted, and this information could let related staffs know the appropriate steps for dealing with an abnormal wafer.
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